From e07be9564611d8150558c7a263ae332ed4341c84 Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Sat, 12 Jun 2021 22:31:48 +0200
Subject: [DYNAREC] Fixed CC flag for SAR

---
 src/dynarec/dynarec_arm64_emit_shift.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src')

diff --git a/src/dynarec/dynarec_arm64_emit_shift.c b/src/dynarec/dynarec_arm64_emit_shift.c
index d252997f..aaf049bb 100755
--- a/src/dynarec/dynarec_arm64_emit_shift.c
+++ b/src/dynarec/dynarec_arm64_emit_shift.c
@@ -257,6 +257,10 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
         }
         return;
     }
+    IFX(X_CF) {
+        ASRxw(s3, s1, c-1);
+        BFIw(xFlags, s3, 0, 1);
+    }
     ASRxw(s1, s1, c);
     IFX(X_PEND) {
         STRxw_U12(s1, xEmu, offsetof(x64emu_t, res));
@@ -267,10 +271,6 @@ void emit_sar32c(dynarec_arm_t* dyn, int ninst, rex_t rex, int s1, int32_t c, in
         Bcond(cNE, +8);
         ORRw_mask(xFlags, xFlags, 0b011010, 0); // mask=0x40
     }
-    IFX(X_CF) {
-        ASRxw(s3, s1, c-1);
-        BFIw(xFlags, s3, 0, 1);
-    }
     IFX(X_SF) {
         LSRxw(s4, s1, (rex.w)?63:31);
         BFIx(xFlags, s4, F_SF, 1);
-- 
cgit 1.4.1