From e8972efca192e988cdd72fc765ef001defe9a5a4 Mon Sep 17 00:00:00 2001
From: ptitSeb <seebastien.chev@gmail.com>
Date: Fri, 11 Aug 2023 16:57:46 +0200
Subject: [32bits] Added 62 opcode ([ARM64_DYNAREC] too)

---
 src/dynarec/arm64/dynarec_arm64_00.c | 11 ++++++++++-
 src/emu/x64run.c                     |  9 ++++++++-
 2 files changed, 18 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index 7bf9511f..df3f3d91 100644
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -679,7 +679,16 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                 DEFAULT;
             }
             break;
-
+        case 0x62:
+            if(rex.is32bits) {
+                // BOUND here
+                DEFAULT;                
+            } else {
+                INST_NAME("BOUND Gd, Ed");
+                nextop = F8;
+                FAKEED(0);
+            }
+            break;
         case 0x63:
             if(rex.is32bits) {
                 // ARPL here
diff --git a/src/emu/x64run.c b/src/emu/x64run.c
index f2cd686d..fb740bd7 100644
--- a/src/emu/x64run.c
+++ b/src/emu/x64run.c
@@ -370,7 +370,14 @@ x64emurun:
                 goto fini;
             }
             break;
-
+        case 0x62:                  /* BOUND Gd, Ed */
+            if(rex.is32bits) {
+                FAKEED(0);
+            } else {
+                unimp = 1;
+                goto fini;
+            }
+            break;
         case 0x63:                      /* MOVSXD Gd,Ed */
             nextop = F8;
             GETED(0);
-- 
cgit 1.4.1