From eee428afe5d7c287ed1c7ddb37a13d4e8290cc26 Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Sat, 27 Jan 2024 17:49:22 +0100
Subject: [ARM64_DYNAREC][32BITS] Added D4/D5 opcodes

---
 src/dynarec/arm64/dynarec_arm64_00.c | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

(limited to 'src')

diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c
index ffb652ba..358b9895 100644
--- a/src/dynarec/arm64/dynarec_arm64_00.c
+++ b/src/dynarec/arm64/dynarec_arm64_00.c
@@ -2631,6 +2631,32 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                     break;
             }
             break;
+        case 0xD4:
+            if(rex.is32bits) {
+                INST_NAME("AAM Ib");
+                SETFLAGS(X_ALL, SF_SET);
+                UBFXx(x1, xRAX, 0, 8);    // load AL
+                u8 = F8;
+                MOV32w(x2, u8);
+                CALL_(aam16, x1, 0);
+                BFIz(xRAX, x1, 0, 16);
+            } else {
+                DEFAULT;
+            }
+            break;
+        case 0xD5:
+            if(rex.is32bits) {
+                INST_NAME("AAD Ib");
+                SETFLAGS(X_ALL, SF_SET);
+                UBFXx(x1, xRAX, 0, 16);    // load AX
+                u8 = F8;
+                MOV32w(x2, u8);
+                CALL_(aad16, x1, 0);
+                BFIz(xRAX, x1, 0, 16);
+            } else {
+                DEFAULT;
+            }
+            break;
 
         case 0xD7:
             INST_NAME("XLAT");
-- 
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