From f1c0b52677c6260b2f5a9b2807aacfb87b58988a Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Tue, 18 Jun 2024 16:22:57 +0200 Subject: [ARM64_DYNAREC] Fixed AVX.66.0F 6B opcode --- src/dynarec/arm64/dynarec_arm64_avx_66_0f.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index 46555c93..2e23b0e1 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -654,7 +654,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, if(!vex.l) YMM0(gd); break; case 0x6B: - INST_NAME("PACKSSDW Gx,Ex"); + INST_NAME("VPACKSSDW Gx, Vx, Ex"); nextop = F8; for(int l=0; l<1+vex.l; ++l) { if(!l) { @@ -663,7 +663,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, GETGY_empty_VYEY(v0, v2, v1); } if(v0==v1) { - q0 = fpu_get_scratch(dyn, ninst); + if(!l) q0 = fpu_get_scratch(dyn, ninst); VMOVQ(q0, v0); } SQXTN_16(v0, v2); -- cgit 1.4.1