From f7326b05333b8b9ec4fa93f05f585505a3a3e63e Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Thu, 4 May 2023 23:10:02 +0800 Subject: [RV64_DYNAREC] Added more opcode for Unciv and some fixes (#759) * Added F2 AF SCASD opcode * Added DD FST opcode * Added DC FCOMP opcode * Added DD FFREE opcode * Added 66 0F 3A 21 INSERTPS opcode --- src/dynarec/rv64/dynarec_rv64_00_2.c | 42 ++++++++++++- src/dynarec/rv64/dynarec_rv64_00_3.c | 4 +- src/dynarec/rv64/dynarec_rv64_660f.c | 18 +++++- src/dynarec/rv64/dynarec_rv64_d8.c | 4 +- src/dynarec/rv64/dynarec_rv64_dc.c | 112 +++++++++++++++++++++++++++++++++ src/dynarec/rv64/dynarec_rv64_dd.c | 11 +++- src/dynarec/rv64/dynarec_rv64_helper.h | 2 +- 7 files changed, 185 insertions(+), 8 deletions(-) create mode 100644 src/dynarec/rv64/dynarec_rv64_dc.c (limited to 'src') diff --git a/src/dynarec/rv64/dynarec_rv64_00_2.c b/src/dynarec/rv64/dynarec_rv64_00_2.c index 0e9144b7..ec296574 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_2.c +++ b/src/dynarec/rv64/dynarec_rv64_00_2.c @@ -690,8 +690,8 @@ uintptr_t dynarec64_00_2(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int SETFLAGS(X_ALL, SF_SET_PENDING); CBZ_NEXT(xRCX); ANDI(x1, xRAX, 0xff); - ANDI(x1, xFlags, 1<>6)&3; else s8 = 0; + // GX->ud[(tmp8u>>4)&3] = EX->ud[tmp8s]; + LWU(x3, wback, fixedaddress+4*s8); + SW(x3, gback, 4*(u8>>4)); + for(int i=0; i<4; ++i) { + if(u8&(1<ud[i] = 0; + SW(xZR, gback, 4*i); + } + break; case 0x22: INST_NAME("PINSRD Gx, ED, Ib"); nextop = F8; diff --git a/src/dynarec/rv64/dynarec_rv64_d8.c b/src/dynarec/rv64/dynarec_rv64_d8.c index 3a66bba4..c3c10166 100644 --- a/src/dynarec/rv64/dynarec_rv64_d8.c +++ b/src/dynarec/rv64/dynarec_rv64_d8.c @@ -62,7 +62,7 @@ uintptr_t dynarec64_D8(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni AND(x5, x5, x4); BEQZ(x5, 24); // undefined/NaN FEQS(x5, v1, v2); - BNEZ(x5, 24); // equal + BNEZ(x5, 28); // equal FLTS(x3, v1, v2); // x3 = (v1 +#include +#include +#include +#include + +#include "debug.h" +#include "box64context.h" +#include "dynarec.h" +#include "emu/x64emu_private.h" +#include "emu/x64run_private.h" +#include "x64run.h" +#include "x64emu.h" +#include "box64stack.h" +#include "callback.h" +#include "emu/x64run_private.h" +#include "x64trace.h" +#include "emu/x87emu_private.h" +#include "dynarec_native.h" + +#include "rv64_printer.h" +#include "dynarec_rv64_private.h" +#include "dynarec_rv64_helper.h" +#include "dynarec_rv64_functions.h" + + +uintptr_t dynarec64_DC(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) +{ + (void)ip; (void)rep; (void)need_epilog; + + uint8_t nextop = F8; + uint8_t wback; + int64_t fixedaddress; + int unscaled; + int v1, v2; + + MAYUSE(v2); + MAYUSE(v1); + + switch(nextop) { + case 0xC0 ... 0xC7: + INST_NAME("FADD STx, ST0"); + DEFAULT; + break; + case 0xC8 ... 0xCF: + INST_NAME("FMUL STx, ST0"); + DEFAULT; + break; + case 0xD0 ... 0xD7: + INST_NAME("FCOM ST0, STx"); //yep + DEFAULT; + break; + case 0xD8 ... 0xDF: + INST_NAME("FCOMP ST0, STx"); + DEFAULT; + break; + case 0xE0 ... 0xE7: + INST_NAME("FSUBR STx, ST0"); + DEFAULT; + break; + break; + case 0xE8 ... 0xEF: + INST_NAME("FSUB STx, ST0"); + DEFAULT; + break; + case 0xF0 ... 0xF7: + INST_NAME("FDIVR STx, ST0"); + DEFAULT; + break; + case 0xF8 ... 0xFF: + INST_NAME("FDIV STx, ST0"); + DEFAULT; + break; + default: + switch((nextop>>3)&7) { + case 3: + INST_NAME("FCOMP ST0, double[ED]"); + v1 = x87_get_st(dyn, ninst, x1, x2, 0, EXT_CACHE_ST_D); + v2 = fpu_get_scratch(dyn); + addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, NULL, 1, 0); + FLD(v2, wback, fixedaddress); + + LHU(x3, xEmu, offsetof(x64emu_t, sw)); + MOV32w(x1, 0b1110100011111111); // mask off c0,c1,c2,c3 + AND(x3, x3, x1); + FEQD(x5, v1, v1); + FEQD(x4, v2, v2); + AND(x5, x5, x4); + BEQZ(x5, 24); // undefined/NaN + FEQD(x5, v1, v2); + BNEZ(x5, 28); // equal + FLTD(x3, v1, v2); // x3 = (v1