diff options
Diffstat (limited to 'gitlab/issues/target_arm/host_missing/accel_missing/2861.toml')
| -rw-r--r-- | gitlab/issues/target_arm/host_missing/accel_missing/2861.toml | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/gitlab/issues/target_arm/host_missing/accel_missing/2861.toml b/gitlab/issues/target_arm/host_missing/accel_missing/2861.toml new file mode 100644 index 00000000..e49002ca --- /dev/null +++ b/gitlab/issues/target_arm/host_missing/accel_missing/2861.toml @@ -0,0 +1,19 @@ +id = 2861 +title = "hw/pci-host/designware.c incorrect write to DESIGNWARE_PCIE_ATU_UPPER_TARGET register" +state = "closed" +created_at = "2025-03-13T13:41:16.866Z" +closed_at = "2025-04-02T00:15:39.783Z" +labels = ["kind::Bug", "target: arm", "workflow::Patch available"] +url = "https://gitlab.com/qemu-project/qemu/-/issues/2861" +host-os = "n/a" +host-arch = "n/a" +qemu-version = "n/a" +guest-os = "n/a" +guest-arch = "n/a" +description = """I think this is a obvious bug + +https://gitlab.com/qemu-project/qemu/-/blob/master/hw/pci-host/designware.c?ref_type=heads#L374 + +Write to register DESIGNWARE_PCIE_ATU_UPPER_TARGET, val should be shifted left to update upper 32 bit part.""" +reproduce = "n/a" +additional = "n/a" |