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+semantic: 0.933
+device: 0.903
+graphic: 0.852
+socket: 0.768
+network: 0.737
+PID: 0.704
+vnc: 0.699
+performance: 0.649
+debug: 0.634
+other: 0.584
+files: 0.444
+permissions: 0.390
+boot: 0.375
+KVM: 0.053
+
+QEMU fails an assertion when hitting a breakpoint that is set on a tlb-missed 2-stage translated AArch64 memory
+Description of problem:
+After upgrading to QEMU v7.2.0 from v7.1.0, when hitting an instruction breakpoint on a memory address that is translated by 2 stages of translation, and is not already cached in the TLB, QEMU fails the assertion at target/arm/ptw.c:301 (`assert(fi->type != ARMFault_None);`).
+
+I believe this was introduced in f3639a64f602ea5c1436eb9c9b89f42028e3a4a8 (@rth7680), since in that commit the failure check for the return value of `get_phys_addr_lpae()` changed from checking for true (meaning failure) to checking for false (which actually means success).