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-rw-r--r--results/classifier/deepseek-2-tmp/output/device/176026232
1 files changed, 0 insertions, 32 deletions
diff --git a/results/classifier/deepseek-2-tmp/output/device/1760262 b/results/classifier/deepseek-2-tmp/output/device/1760262
deleted file mode 100644
index 5a5bd43c..00000000
--- a/results/classifier/deepseek-2-tmp/output/device/1760262
+++ /dev/null
@@ -1,32 +0,0 @@
-
-cmsdk-apb-uart doesn't appear to clear interrupt flags
-
-I have been writing a small operating system and using QEMU emulating the mps2-an385 board for some of my testing.
-
-During development of the uart driver I observed some odd behaviour with the TX interrupt -- writing a '1' to bit 0 of the INTCLEAR register doesn't clear the TX interrupt flag, and the interrupt fires continuously.
-
-It's possible that I have an error somewhere in my code, but after inspecting the QEMU source it does appear to be a QEMU bug. I applied the following patch and it solved my issue:
-
-From 9875839c144fa60a3772f16ae44d32685f9328aa Mon Sep 17 00:00:00 2001
-From: Patrick Oppenlander <email address hidden>
-Date: Sat, 31 Mar 2018 15:10:28 +1100
-Subject: [PATCH] hw/char/cmsdk-apb-uart: fix clearing of interrupt flags
-
----
- hw/char/cmsdk-apb-uart.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c
-index 1ad1e14295..64991bd9d7 100644
---- a/hw/char/cmsdk-apb-uart.c
-+++ b/hw/char/cmsdk-apb-uart.c
-@@ -274,6 +274,7 @@ static void uart_write(void *opaque, hwaddr offset, uint64_t value,
-          * is then reflected into the intstatus value by the update function).
-          */
-         s->state &= ~(value & (R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK));
-+        s->intstatus &= ~(value & ~(R_INTSTATUS_TXO_MASK | R_INTSTATUS_RXO_MASK));
-         cmsdk_apb_uart_update(s);
-         break;
-     case A_BAUDDIV:
--- 
-2.16.2
\ No newline at end of file