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Diffstat (limited to 'results/classifier/qwen3:32b/output/runtime/1248168')
| -rw-r--r-- | results/classifier/qwen3:32b/output/runtime/1248168 | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/results/classifier/qwen3:32b/output/runtime/1248168 b/results/classifier/qwen3:32b/output/runtime/1248168 new file mode 100644 index 00000000..06b56a32 --- /dev/null +++ b/results/classifier/qwen3:32b/output/runtime/1248168 @@ -0,0 +1,27 @@ + + + +MIPS, self-modifying code and uncached memory + +Self-modifying code does not work properly in MIPS in uncached and unmapped kseg1 memory region. + +For example, when running this code I get unexpected behavior: + + 0: e3000010 b 0x390 + 4: 00000000 nop + ... + 380: 00701f40 mfc0 ra,c0_epc + 384: 0400e0bb swr zero,4(ra) + 388: 18000042 eret + 38c: 00000000 nop + 390: 25500000 move t2,zero + 394: 02000b34 li t3,0x2 + 398: 23504b01 subu t2,t2,t3 + 39c: e9003c0b j 0xcf003a4 + 3a0: 0a004a21 addi t2,t2,10 + 3a4: ffff0010 b 0x3a4 + 3a8: 00000000 nop + 3ac: 00000000 nop + + I expect that swr instruction in line 384 would change `addi t2,t2,1`0 to `nop` +This should work because no cache is used for this memory region.
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