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Diffstat (limited to 'results/classifier/semantic-bugs/instruction/1079080')
| -rw-r--r-- | results/classifier/semantic-bugs/instruction/1079080 | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/results/classifier/semantic-bugs/instruction/1079080 b/results/classifier/semantic-bugs/instruction/1079080 deleted file mode 100644 index c3723248..00000000 --- a/results/classifier/semantic-bugs/instruction/1079080 +++ /dev/null @@ -1,43 +0,0 @@ -instruction: 0.967 -graphic: 0.903 -device: 0.901 -semantic: 0.833 -network: 0.755 -socket: 0.707 -vnc: 0.648 -boot: 0.648 -other: 0.637 -mistranslation: 0.619 -assembly: 0.187 -KVM: 0.100 - -ARM instruction "srs" wrong behaviour - -Quote from ARM Architecture Reference Manual ARMv7-A and ARMv7-R : -"Store Return State stores the LR and SPSR of the current mode to the stack of a specified mode" - -Problem: -When executing this instruction, the register stored is CPSR instead of SPSR. - -Context: -Using QEMU 1.2.0 to simulate a Zynq application (processor Cortex-a9 mpcore) with the following command line: -qemu-system-arm -M xilinx-zynq-a9 -m 512 -serial null -serial mon:stdio -dtb /home/vcesson/workspace/xilinx_zynq.dtb -kernel install/tests/io/serial/current/tests/serial2 -S -s -nographic - -It looks like this is only a problem in Thumb mode; the equivalent bug in ARM mode was fixed in commit c67b6b71 back in 2009. - -Can you make the test case dtb and image available? That would help in testing... - - - - - - -Thanks -- I've submitted a patch which fixes this: http://patchwork.ozlabs.org/patch/220748/ - -If you'd like to give me a name/email [format "Full Name <email address hidden>"] I can credit you in a Reported-by: tag in the commit message... - - -You are welcome. -Credit info you need: Cesson Vincent <email address hidden> -Thank you for fixing it! - |