From 4b927bc37359dec23f67d3427fc982945f24f404 Mon Sep 17 00:00:00 2001 From: Christian Krinitsin Date: Wed, 21 May 2025 21:21:26 +0200 Subject: add gitlab issues in toml format --- .../target_ppc/host_missing/accel_missing/2663.toml | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml (limited to 'gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml') diff --git a/gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml b/gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml new file mode 100644 index 00000000..610fe1a8 --- /dev/null +++ b/gitlab/issues/target_ppc/host_missing/accel_missing/2663.toml @@ -0,0 +1,17 @@ +id = 2663 +title = "powerpc: for 6xx,7xx,74xx msr and srr1 are not set correctly on exception" +state = "opened" +created_at = "2024-11-08T13:43:03.119Z" +closed_at = "n/a" +labels = ["kind::Bug", "target: ppc", "workflow::Patch available"] +url = "https://gitlab.com/qemu-project/qemu/-/issues/2663" +host-os = "n/a" +host-arch = "n/a" +qemu-version = "n/a" +guest-os = "n/a" +guest-arch = "n/a" +description = """When an exception is raised, qemu does not set bits in SRR1 and MSR correctly. + +This causes some operating systems to not work, in particular early little endian ones like Windows NT.""" +reproduce = "n/a" +additional = """The following patch changes the MSR and SRR1 bit settings on exception to what is mentioned in the various user manuals for the 6xx, 7xx and 74xx series (6xx and 7xx are effectively identical, 74xx has some additional changes): [exception_msr.patch](/uploads/aae17dd35f0f0e72b831243fcfd0c416/exception_msr.patch)""" -- cgit 1.4.1