instruction: 0.950 graphic: 0.840 semantic: 0.801 device: 0.645 other: 0.493 socket: 0.420 network: 0.394 mistranslation: 0.346 boot: 0.280 vnc: 0.269 assembly: 0.183 KVM: 0.107 powerpc instruction 'mffsl' not emulated on POWER8 Description of problem: Since 2019, the function feenableexcept() in GNU libc makes use of the "mffsl" instruction. See https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/powerpc/fpu/feenablxcpt.c;h=b111ceaa4e2e1864fcbe043ccda34e03e9f14062;hb=HEAD#l28 and https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/powerpc/fpu/fenv_libc.h;h=a2a12d914b47e99746003482b349a0675cc5ad34;hb=HEAD#l57 In the emulated Debian system, executables that make use of this instruction crash with SIGILL. Likewise, under gdb (in the emulated system), there is a SIGILL at the 'mffsl' instruction. From the comments in the above glibc source, added by Paul A. Clarke : "Nicely, it turns out that the 'mffsl' instruction will decode to 'mffs' on architectures older than "power9" because the additional bits set for 'mffsl' are "don't care" for 'mffs'. 'mffs' is a superset of 'mffsl'." This is indeed what I observe by compiling and running the attached program foo.c on a hardware machine with a POWER8 CPU: That program does not crash with a SIGILL. Steps to reproduce: 1. Either run the attached 'test-fenv-except-tracking-5.ppc' (32-bit) program under qemu-system-ppc. 2. Or run the the attached 'test-fenv-except-tracking-5.ppc64' (64-bit) program under qemu-system-ppc64 with -cpu POWER8. 3. Or compile and run the attached foo.c and run it under QEMU. Additional information: [test-fenv-except-tracking-5.ppc.xz](/uploads/8222ebac115e8a865d5e520b25d423ff/test-fenv-except-tracking-5.ppc.xz) [test-fenv-except-tracking-5.ppc64.xz](/uploads/d0522723541a46e11ab55b8f45dfb574/test-fenv-except-tracking-5.ppc64.xz) [foo.c](/uploads/35d8b3b1e5b39ecb6a2a899132858ded/foo.c)