RISC-V 64, CPUs do ilegal 0x00 write with SMP

When QEMU is runt like this:

qemu-system-riscv64 -d unimp,guest_errors -smp 8

Other harts will do a illegal write on address 0x00.

This could be mostly (i think) because the initial assembly code is only loaded on the first hart and the others do a mess because there is no code to execute.