Merge pull request #1382 from 327135569/cleancheck

Clean encode's value check

4 files changed, 4 insertions, 35 deletions

diff --git a/miasm/arch/aarch64/arch.py b/miasm/arch/aarch64/arch.py
index fc188ff2..f4882845 100644
--- a/miasm/arch/aarch64/arch.py
+++ b/miasm/arch/aarch64/arch.py
@@ -1797,8 +1797,6 @@ class op0_value(aarch64_uint64):
         v = self.encodeval(v)
         if v is False:
             return False
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
diff --git a/miasm/arch/arm/arch.py b/miasm/arch/arm/arch.py
index abe6711f..6c5b0ce2 100644
--- a/miasm/arch/arm/arch.py
+++ b/miasm/arch/arm/arch.py
@@ -1676,10 +1676,6 @@ class armt_barrier_option(reg_noarg, arm_arg):
             log.debug("cannot encode reg %r", self.expr)
             return False
         self.value = self.reg_info.dct_expr_inv[self.expr]
-        if self.value > self.lmask:
-            log.debug("cannot encode field value %x %x",
-                      self.value, self.lmask)
-            return False
         return True
 
     def check_fbits(self, v):
@@ -1749,8 +1745,6 @@ class arm_widthm1(arm_imm, m_arg):
         if not isinstance(self.expr, ExprInt):
             return False
         v = int(self.expr) +  -1
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
@@ -1996,8 +1990,6 @@ class arm_offpc(arm_offreg):
         if v & 3:
             return False
         v >>= 2
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
@@ -2099,8 +2091,6 @@ class arm_offbw(imm_noarg):
                 log.debug('off must be aligned %r', v)
                 return False
             v >>= 2
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
@@ -2117,8 +2107,6 @@ class arm_off(imm_noarg):
         if not isinstance(self.expr, ExprInt):
             return False
         v = int(self.expr)
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
@@ -2139,8 +2127,6 @@ class arm_offh(imm_noarg):
             log.debug('off must be aligned %r', v)
             return False
         v >>= 1
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
@@ -2284,8 +2270,6 @@ class armt_rlist_pclr(armt_rlist):
         v = 0
         for r in rlist:
             v |= 1 << r
-        if v > self.lmask:
-            return False
         self.value = v
         return True
 
diff --git a/miasm/arch/x86/arch.py b/miasm/arch/x86/arch.py
index d17577fc..a886e799 100644
--- a/miasm/arch/x86/arch.py
+++ b/miasm/arch/x86/arch.py
@@ -2548,10 +2548,6 @@ class x86_rm_reg_noarg(object):
             i -= 8
             self.setrexsize(1)
         self.value = i
-        if self.value > self.lmask:
-            log.debug("cannot encode field value %x %x",
-                      self.value, self.lmask)
-            return False
         return True
 
 
@@ -2573,10 +2569,6 @@ class x86_rm_reg_mm(x86_rm_reg_noarg, x86_arg):
             i -= 8
             self.setrexsize(1)
         self.value = i
-        if self.value > self.lmask:
-            log.debug("cannot encode field value %x %x",
-                      self.value, self.lmask)
-            return False
         return True
 
 class x86_rm_reg_xmm(x86_rm_reg_mm):
diff --git a/miasm/core/cpu.py b/miasm/core/cpu.py
index 6c73c4c1..d9c1955b 100644
--- a/miasm/core/cpu.py
+++ b/miasm/core/cpu.py
@@ -737,10 +737,6 @@ class reg_noarg(object):
             log.debug("cannot encode reg %r", self.expr)
             return False
         self.value = self.reg_info.expr.index(self.expr)
-        if self.value > self.lmask:
-            log.debug("cannot encode field value %x %x",
-                      self.value, self.lmask)
-            return False
         return True
 
     def check_fbits(self, v):
@@ -1456,7 +1452,10 @@ class cls_mn(with_metaclass(metamn, object)):
                     break
 
                 if f.value is not None and f.l:
-                    assert f.value <= f.lmask
+                    if f.value > f.lmask:
+                        log.debug('cannot encode %r', f)
+                        can_encode = False
+                        break
                     cur_len += f.l
                 index += 1
                 if ret is True:
@@ -1595,8 +1594,6 @@ class imm_noarg(object):
         return v
 
     def encodeval(self, v):
-        if v > self.lmask:
-            return False
         return v
 
     def decode(self, v):
@@ -1615,8 +1612,6 @@ class imm_noarg(object):
         v = self.encodeval(v)
         if v is False:
             return False
-        if v > self.lmask:
-            return False
         self.value = v
         return True