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| author | Christian Krinitsin <mail@krinitsin.com> | 2025-09-11 15:05:50 +0200 |
|---|---|---|
| committer | Theofilos Augoustis <theofilos.augoustis@gmail.com> | 2025-10-09 15:26:04 +0000 |
| commit | 1d230574c81113e15013f77db8d1bcdd45330d20 (patch) | |
| tree | 4ab3a71b51ebb896194f4585363a46623d084ef8 | |
| parent | 08c22a46cc54da3cf4670ae0f263182d24ccdd86 (diff) | |
| download | focaccia-miasm-1d230574c81113e15013f77db8d1bcdd45330d20.tar.gz focaccia-miasm-1d230574c81113e15013f77db8d1bcdd45330d20.zip | |
Add BLSR instruction
| -rw-r--r-- | miasm/arch/x86/arch.py | 1 | ||||
| -rw-r--r-- | miasm/arch/x86/sem.py | 18 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 3 |
3 files changed, 22 insertions, 0 deletions
diff --git a/miasm/arch/x86/arch.py b/miasm/arch/x86/arch.py index e63ce6cf..c8176186 100644 --- a/miasm/arch/x86/arch.py +++ b/miasm/arch/x86/arch.py @@ -3787,6 +3787,7 @@ addop("blsi", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("011"), rm_arg), [vex_r addop("andn", [pref_0f38, bs8(0xf2), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, vex_reg, rm_arg]) addop("bextr", [pref_0f38, bs8(0xf7), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, rm_arg, vex_reg]) addop("blsmsk", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("010"), rm_arg), [vex_reg, rm_arg]) +addop("blsr", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("001"), rm_arg), [vex_reg, rm_arg]) # addop("finit", [bs8(0x9b), bs8(0xdb), bs8(0xe3)]) addop("fninit", [bs8(0xdb), bs8(0xe3)]) diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index c4120566..ff220471 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -4434,6 +4434,23 @@ def blsmsk(_, instr, dst, src): e.append(m2_expr.ExprAssign(dst, result)) return e, [] +def blsr(_, instr, dst, src): + e = [] + + tmp = src - m2_expr.ExprInt(1, src.size) + result = tmp & src + + e += update_flag_zf(result) + e += update_flag_nf(result) + e.append(m2_expr.ExprAssign(of, m2_expr.ExprInt(0, of.size))) + + e.append(m2_expr.ExprAssign(cf, m2_expr.ExprCond(src, + m2_expr.ExprInt(0, 1), + m2_expr.ExprInt(1, 1)))) + + e.append(m2_expr.ExprAssign(dst, result)) + return e, [] + def pshufb(_, instr, dst, src): e = [] if dst.size == 64: @@ -5569,6 +5586,7 @@ mnemo_func = {'mov': mov, "andn": andn, "bextr": bextr, "blsmsk": blsmsk, + "blsr": blsr, # # MMX/AVX/SSE operations diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 7e44e903..595f989b 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2602,6 +2602,9 @@ reg_tests = [ (m64, "00000000 BLSMSK RAX, RBX", "c4e2f8f3d3"), + (m64, "00000000 BLSR RAX, RBX", + "c4e2f8f3cb"), + #### MMX/SSE/AVX operations #### |