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authorFabrice Desclaux <fabrice.desclaux@cea.fr>2020-12-25 22:23:01 +0100
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2020-12-25 22:23:01 +0100
commit1d95a7febaee8c53df432cdbf1539f6f58a4d5d9 (patch)
tree4afb9c40cc0aad93a3a5d26bb84f487da5a667e2 /miasm/analysis/debugging.py
parent972cad3a89d2856a6969328a9870a1b472cd9fd2 (diff)
downloadfocaccia-miasm-1d95a7febaee8c53df432cdbf1539f6f58a4d5d9.tar.gz
focaccia-miasm-1d95a7febaee8c53df432cdbf1539f6f58a4d5d9.zip
Rename ir_arch for jitter
Diffstat (limited to 'miasm/analysis/debugging.py')
-rw-r--r--miasm/analysis/debugging.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/miasm/analysis/debugging.py b/miasm/analysis/debugging.py
index 3cbbf482..56ef8646 100644
--- a/miasm/analysis/debugging.py
+++ b/miasm/analysis/debugging.py
@@ -212,7 +212,7 @@ class Debugguer(object):
     def set_reg_value(self, reg_name, value):
 
         # Handle PC case
-        if reg_name == self.myjit.ir_arch.pc.name:
+        if reg_name == self.myjit.lifter.pc.name:
             self.init_run(value)
 
         setattr(self.myjit.cpu, reg_name, value)