about summary refs log tree commit diff stats
path: root/miasm2/arch/mips32/jit.py
diff options
context:
space:
mode:
authorFabrice Desclaux <fabrice.desclaux@cea.fr>2017-03-13 14:19:44 +0100
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2017-03-13 15:07:28 +0100
commit1b3fcbdda83d6f248a11de30aaa7cfbf1f775b2e (patch)
treef2ed11ae52cff5c21617d239f54d9d99f696cff3 /miasm2/arch/mips32/jit.py
parent7a473f0df464b3134bad5ad028e92cf780cd2cc5 (diff)
downloadfocaccia-miasm-1b3fcbdda83d6f248a11de30aaa7cfbf1f775b2e.tar.gz
focaccia-miasm-1b3fcbdda83d6f248a11de30aaa7cfbf1f775b2e.zip
Core/asmbloc: move asmbloc to asmblock
Diffstat (limited to 'miasm2/arch/mips32/jit.py')
-rw-r--r--miasm2/arch/mips32/jit.py6
1 files changed, 3 insertions, 3 deletions
diff --git a/miasm2/arch/mips32/jit.py b/miasm2/arch/mips32/jit.py
index c979b90b..0ba531f1 100644
--- a/miasm2/arch/mips32/jit.py
+++ b/miasm2/arch/mips32/jit.py
@@ -1,7 +1,7 @@
 import logging
 
 from miasm2.jitter.jitload import jitter
-from miasm2.core import asmbloc
+from miasm2.core import asmblock
 from miasm2.core.utils import pck32, upck32
 from miasm2.arch.mips32.sem import ir_mips32l, ir_mips32b
 from miasm2.jitter.codegen import CGen
@@ -77,7 +77,7 @@ class jitter_mips32l(jitter):
     C_Gen = mipsCGen
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.AsmSymbolPool()
+        sp = asmblock.AsmSymbolPool()
         jitter.__init__(self, ir_mips32l(sp), *args, **kwargs)
         self.vm.set_little_endian()
 
@@ -101,6 +101,6 @@ class jitter_mips32l(jitter):
 class jitter_mips32b(jitter_mips32l):
 
     def __init__(self, *args, **kwargs):
-        sp = asmbloc.AsmSymbolPool()
+        sp = asmblock.AsmSymbolPool()
         jitter.__init__(self, ir_mips32b(sp), *args, **kwargs)
         self.vm.set_big_endian()