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authorFabrice Desclaux <fabrice.desclaux@cea.fr>2020-12-25 21:37:02 +0100
committerFabrice Desclaux <fabrice.desclaux@cea.fr>2020-12-25 21:37:02 +0100
commit972cad3a89d2856a6969328a9870a1b472cd9fd2 (patch)
tree65687e39ab4ce446957c73d95fd5d662b49d68ed /test
parentdd14b59efbd918838dcbb88c8d64bad53fcd054c (diff)
downloadfocaccia-miasm-972cad3a89d2856a6969328a9870a1b472cd9fd2.tar.gz
focaccia-miasm-972cad3a89d2856a6969328a9870a1b472cd9fd2.zip
Rename examples lifter
Diffstat (limited to 'test')
-rw-r--r--test/analysis/unssa.py8
-rwxr-xr-xtest/arch/arm/sem.py12
-rwxr-xr-xtest/arch/msp430/sem.py12
-rw-r--r--test/arch/ppc32/sem.py12
-rwxr-xr-xtest/arch/x86/sem.py34
5 files changed, 39 insertions, 39 deletions
diff --git a/test/analysis/unssa.py b/test/analysis/unssa.py
index bc7db487..7f03e3f8 100644
--- a/test/analysis/unssa.py
+++ b/test/analysis/unssa.py
@@ -575,14 +575,14 @@ class IRAOutRegs(IRATest):
 
 
 
-def add_out_reg_end(ir_arch_a, ircfg_a):
+def add_out_reg_end(lifter_a, ircfg_a):
     # Add dummy dependency to uncover out regs affectation
     for loc in ircfg_a.leaves():
         irblock = ircfg_a.blocks.get(loc)
         if irblock is None:
             continue
         regs = {}
-        for reg in ir_arch_a.get_out_regs(irblock):
+        for reg in lifter.get_out_regs(irblock):
             regs[reg] = reg
         assignblks = list(irblock)
         new_assiblk = AssignBlock(regs, assignblks[-1].instr)
@@ -591,7 +591,7 @@ def add_out_reg_end(ir_arch_a, ircfg_a):
         ircfg_a.blocks[loc] = new_irblock
 
 
-ir_arch_a = IRAOutRegs(loc_db)
+lifter = IRAOutRegs(loc_db)
 
 
 class CustomIRCFGSimplifierSSA(IRCFGSimplifierSSA):
@@ -631,7 +631,7 @@ for test_nb, ircfg in enumerate(
 
     # SSA
     head = LBL0
-    simplifier = CustomIRCFGSimplifierSSA(ir_arch_a)
+    simplifier = CustomIRCFGSimplifierSSA(lifter)
     ircfg = simplifier(ircfg, head)
     open('final_%d.dot' % test_nb, 'w').write(ircfg.dot())
 
diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py
index 1dca9a6b..a5b6d5eb 100755
--- a/test/arch/arm/sem.py
+++ b/test/arch/arm/sem.py
@@ -9,7 +9,7 @@ from future.utils import viewitems
 
 from miasm.ir.symbexec import SymbolicExecutionEngine
 from miasm.arch.arm.arch import mn_arm as mn
-from miasm.arch.arm.sem import Lifter_Arml as ir_arch
+from miasm.arch.arm.sem import Lifter_Arml as Lifter
 from miasm.arch.arm.regs import *
 from miasm.expression.expression import *
 from miasm.core.locationdb import LocationDB
@@ -17,7 +17,7 @@ from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 loc_db = LocationDB()
-EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
+EXCLUDE_REGS = set([Lifter(loc_db).IRDst])
 
 
 def M(addr):
@@ -28,14 +28,14 @@ def compute(asm, inputstate={}, debug=False):
     loc_db = LocationDB()
     sympool = dict(regs_init)
     sympool.update({k: ExprInt(v, k.size) for k, v in viewitems(inputstate)})
-    ir_tmp = ir_arch(loc_db)
-    ircfg = ir_tmp.new_ircfg()
-    symexec = SymbolicExecutionEngine(ir_tmp, sympool)
+    lifter = Lifter(loc_db)
+    ircfg = lifter.new_ircfg()
+    symexec = SymbolicExecutionEngine(lifter, sympool)
     instr = mn.fromstring(asm, loc_db, "l")
     code = mn.asm(instr)[0]
     instr = mn.dis(code, "l")
     instr.offset = inputstate.get(PC, 0)
-    lbl = ir_tmp.add_instr_to_ircfg(instr, ircfg)
+    lbl = lifter.add_instr_to_ircfg(instr, ircfg)
     symexec.run_at(ircfg, lbl)
     if debug:
         for k, v in viewitems(symexec.symbols):
diff --git a/test/arch/msp430/sem.py b/test/arch/msp430/sem.py
index e47c6f30..51a2c540 100755
--- a/test/arch/msp430/sem.py
+++ b/test/arch/msp430/sem.py
@@ -9,14 +9,14 @@ from future.utils import viewitems
 
 from miasm.ir.symbexec import SymbolicExecutionEngine
 from miasm.arch.msp430.arch import mn_msp430 as mn, mode_msp430 as mode
-from miasm.arch.msp430.sem import Lifter_MSP430 as ir_arch
+from miasm.arch.msp430.sem import Lifter_MSP430 as Lifter
 from miasm.arch.msp430.regs import *
 from miasm.expression.expression import *
 from miasm.core.locationdb import LocationDB
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 loc_db = LocationDB()
-EXCLUDE_REGS = set([res, ir_arch(loc_db).IRDst])
+EXCLUDE_REGS = set([res, Lifter(loc_db).IRDst])
 
 
 def M(addr):
@@ -27,14 +27,14 @@ def compute(asm, inputstate={}, debug=False):
     loc_db = LocationDB()
     sympool = dict(regs_init)
     sympool.update({k: ExprInt(v, k.size) for k, v in viewitems(inputstate)})
-    ir_tmp = ir_arch(loc_db)
-    ircfg = ir_tmp.new_ircfg()
-    symexec = SymbolicExecutionEngine(ir_tmp, sympool)
+    lifter = Lifter(loc_db)
+    ircfg = lifter.new_ircfg()
+    symexec = SymbolicExecutionEngine(lifter, sympool)
     instr = mn.fromstring(asm, mode)
     code = mn.asm(instr)[0]
     instr = mn.dis(code, mode)
     instr.offset = inputstate.get(PC, 0)
-    loc_key = ir_tmp.add_instr_to_ircfg(instr, ircfg)
+    loc_key = lifter.add_instr_to_ircfg(instr, ircfg)
     symexec.run_at(ircfg, loc_key)
     if debug:
         for k, v in viewitems(symexec.symbols):
diff --git a/test/arch/ppc32/sem.py b/test/arch/ppc32/sem.py
index c4b08485..c3a18531 100644
--- a/test/arch/ppc32/sem.py
+++ b/test/arch/ppc32/sem.py
@@ -9,7 +9,7 @@ from future.utils import viewitems
 
 from miasm.ir.symbexec import SymbolicExecutionEngine
 from miasm.arch.ppc.arch import mn_ppc as mn
-from miasm.arch.ppc.sem import Lifter_PPC32b as ir_arch
+from miasm.arch.ppc.sem import Lifter_PPC32b as Lifter
 from miasm.arch.ppc.regs import *
 from miasm.expression.expression import *
 from miasm.core.locationdb import LocationDB
@@ -17,7 +17,7 @@ from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 loc_db = LocationDB()
-EXCLUDE_REGS = set([ir_arch(loc_db).IRDst])
+EXCLUDE_REGS = set([Lifter(loc_db).IRDst])
 
 
 def M(addr):
@@ -28,14 +28,14 @@ def compute(asm, inputstate={}, debug=False):
     loc_db = LocationDB()
     sympool = dict(regs_init)
     sympool.update({k: ExprInt(v, k.size) for k, v in viewitems(inputstate)})
-    ir_tmp = ir_arch(loc_db)
-    ircfg = ir_tmp.new_ircfg()
-    symexec = SymbolicExecutionEngine(ir_tmp, sympool)
+    lifter = Lifter(loc_db)
+    ircfg = lifter.new_ircfg()
+    symexec = SymbolicExecutionEngine(lifter, sympool)
     instr = mn.fromstring(asm, loc_db, "b")
     code = mn.asm(instr)[0]
     instr = mn.dis(code, "b")
     instr.offset = inputstate.get(PC, 0)
-    lbl = ir_tmp.add_instr_to_ircfg(instr, ircfg)
+    lbl = lifter.add_instr_to_ircfg(instr, ircfg)
     symexec.run_at(ircfg, lbl)
     if debug:
         for k, v in viewitems(symexec.symbols):
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index ecee5772..5bca413f 100755
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -14,7 +14,7 @@ import copy
 
 from miasm.ir.symbexec import SymbolicExecutionEngine
 from miasm.arch.x86.arch import mn_x86 as mn
-from miasm.arch.x86.sem import Lifter_X86_32 as ir_32, Lifter_X86_64 as ir_64
+from miasm.arch.x86.sem import Lifter_X86_32, Lifter_X86_64
 from miasm.arch.x86.regs import *
 from miasm.expression.expression import *
 from miasm.expression.simplifications import expr_simp
@@ -23,16 +23,16 @@ from miasm.core.locationdb import LocationDB
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 loc_db = LocationDB()
-EXCLUDE_REGS = set([ir_32(loc_db).IRDst, ir_64(loc_db).IRDst])
+EXCLUDE_REGS = set([Lifter_X86_32(loc_db).IRDst, Lifter_X86_64(loc_db).IRDst])
 
 
 m32 = 32
 m64 = 64
 
-def symb_exec(lbl, ir_arch, ircfg, inputstate, debug):
+def symb_exec(lbl, lifter, ircfg, inputstate, debug):
     sympool = dict(regs_init)
     sympool.update(inputstate)
-    symexec = SymbolicExecutionEngine(ir_arch, sympool)
+    symexec = SymbolicExecutionEngine(lifter, sympool)
     symexec.run_at(ircfg, lbl)
     if debug:
         for k, v in viewitems(symexec.symbols):
@@ -43,27 +43,27 @@ def symb_exec(lbl, ir_arch, ircfg, inputstate, debug):
         if k not in EXCLUDE_REGS and regs_init.get(k, None) != v
     }
 
-def compute(ir, mode, asm, inputstate={}, debug=False):
+def compute(Lifter, mode, asm, inputstate={}, debug=False):
     loc_db = LocationDB()
     instr = mn.fromstring(asm, loc_db, mode)
     code = mn.asm(instr)[0]
     instr = mn.dis(code, mode)
     instr.offset = inputstate.get(EIP, 0)
-    ir_arch = ir(loc_db)
-    ircfg = ir_arch.new_ircfg()
-    lbl = ir_arch.add_instr_to_ircfg(instr, ircfg)
-    return symb_exec(lbl, ir_arch, ircfg, inputstate, debug)
+    lifter = Lifter(loc_db)
+    ircfg = lifter.new_ircfg()
+    lbl = lifter.add_instr_to_ircfg(instr, ircfg)
+    return symb_exec(lbl, lifter, ircfg, inputstate, debug)
 
 
-def compute_txt(ir, mode, txt, inputstate={}, debug=False):
+def compute_txt(Lifter, mode, txt, inputstate={}, debug=False):
     loc_db = LocationDB()
     asmcfg = parse_asm.parse_txt(mn, mode, txt, loc_db)
     loc_db.set_location_offset(loc_db.get_name_location("main"), 0x0)
     patches = asmblock.asm_resolve_final(mn, asmcfg)
-    ir_arch = ir(loc_db)
+    lifter = Lifter(loc_db)
     lbl = loc_db.get_name_location("main")
-    ircfg = ir_arch.new_ircfg_from_asmcfg(asmcfg)
-    return symb_exec(lbl, ir_arch, ircfg, inputstate, debug)
+    ircfg = lifter.new_ircfg_from_asmcfg(asmcfg)
+    return symb_exec(lbl, lifter, ircfg, inputstate, debug)
 
 op_add = lambda a, b: a+b
 op_sub = lambda a, b: a-b
@@ -102,7 +102,7 @@ class TestX86Semantic(unittest.TestCase):
     def int_sse_op(self, name, op, elt_size, reg_size, arg1, arg2):
         arg1 = ExprInt(arg1, XMM0.size)
         arg2 = ExprInt(arg2, XMM0.size)
-        sem = compute(ir_32, m32, '%s XMM0, XMM1' % name,
+        sem = compute(Lifter_X86_32, m32, '%s XMM0, XMM1' % name,
                                   {XMM0: arg1, XMM1: arg2},
                                   False)
         ref = ExprInt(int_vec_op(op, elt_size, reg_size, int(arg1), int(arg2)), XMM0.size)
@@ -111,7 +111,7 @@ class TestX86Semantic(unittest.TestCase):
     def symb_sse_ops(self, names, a, b, ref):
         asm = "\n\t".join(["%s XMM0, XMM1" % name for name in names])
         asm = "main:\n\t" + asm
-        sem = compute_txt(ir_32, m32, asm,
+        sem = compute_txt(Lifter_X86_32, m32, asm,
                                   {XMM0: a, XMM1: b},
                                   False)
         self.assertEqual(sem, {XMM0: ref, XMM1: b})
@@ -119,7 +119,7 @@ class TestX86Semantic(unittest.TestCase):
     def mmx_logical_op(self, name, op, arg1, arg2):
         arg1 = ExprInt(arg1, mm0.size)
         arg2 = ExprInt(arg2, mm0.size)
-        sem = compute(ir_32, m32, '%s MM0, MM1' % name,
+        sem = compute(Lifter_X86_32, m32, '%s MM0, MM1' % name,
                                   {mm0: arg1, mm1: arg2},
                                   False)
         ref = ExprInt(op(int(arg1), int(arg2)), mm0.size)
@@ -128,7 +128,7 @@ class TestX86Semantic(unittest.TestCase):
     def sse_logical_op(self, name, op, arg1, arg2):
         arg1 = ExprInt(arg1, XMM0.size)
         arg2 = ExprInt(arg2, XMM1.size)
-        sem = compute(ir_32, m32, '%s XMM0, XMM1' % name,
+        sem = compute(Lifter_X86_32, m32, '%s XMM0, XMM1' % name,
                                   {XMM0: arg1, XMM1: arg2},
                                   False)
         ref = ExprInt(op(int(arg1), int(arg2)), XMM0.size)