diff options
| -rw-r--r-- | miasm/arch/x86/arch.py | 1 | ||||
| -rw-r--r-- | miasm/arch/x86/sem.py | 25 | ||||
| -rw-r--r-- | test/arch/x86/arch.py | 3 |
3 files changed, 29 insertions, 0 deletions
diff --git a/miasm/arch/x86/arch.py b/miasm/arch/x86/arch.py index c8176186..f539e789 100644 --- a/miasm/arch/x86/arch.py +++ b/miasm/arch/x86/arch.py @@ -3788,6 +3788,7 @@ addop("andn", [pref_0f38, bs8(0xf2), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, ve addop("bextr", [pref_0f38, bs8(0xf7), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, rm_arg, vex_reg]) addop("blsmsk", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("010"), rm_arg), [vex_reg, rm_arg]) addop("blsr", [pref_0f38, bs8(0xf3), vex_reg] + rmmod(bs("001"), rm_arg), [vex_reg, rm_arg]) +addop("bzhi", [pref_0f38, bs8(0xf5), vex_reg] + rmmod(rmreg, rm_arg), [rmreg, rm_arg, vex_reg]) # addop("finit", [bs8(0x9b), bs8(0xdb), bs8(0xe3)]) addop("fninit", [bs8(0xdb), bs8(0xe3)]) diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index ff220471..ce5d758a 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -4451,6 +4451,30 @@ def blsr(_, instr, dst, src): e.append(m2_expr.ExprAssign(dst, result)) return e, [] +def bzhi(_, instr, dst, src1, src2): + e = [] + + operand_size = m2_expr.ExprInt(dst.size, dst.size) + index = src2[:7].zeroExtend(dst.size) + mask = m2_expr.ExprInt(0, dst.size).mask >> (operand_size + - index + - m2_expr.ExprInt(1, dst.size)) + + result = m2_expr.ExprCond(m2_expr.ExprOp("FLAG_SIGN_SUB", index, operand_size), + src1 & mask, src1) + + + operand_size_dec = operand_size - m2_expr.ExprInt(1, dst.size) + e.append(m2_expr.ExprAssign(cf, m2_expr.ExprCond(m2_expr.ExprOp("FLAG_SIGN_SUB", operand_size_dec, index), + m2_expr.ExprInt(1, 1), + m2_expr.ExprInt(0, 1)))) + + e += update_flag_zf(result) + e += update_flag_nf(result) + e.append(m2_expr.ExprAssign(of, m2_expr.ExprInt(0, of.size))) + e.append(m2_expr.ExprAssign(dst, result)) + return e, [] + def pshufb(_, instr, dst, src): e = [] if dst.size == 64: @@ -5587,6 +5611,7 @@ mnemo_func = {'mov': mov, "bextr": bextr, "blsmsk": blsmsk, "blsr": blsr, + "bzhi": bzhi, # # MMX/AVX/SSE operations diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py index 595f989b..bd1b776d 100644 --- a/test/arch/x86/arch.py +++ b/test/arch/x86/arch.py @@ -2605,6 +2605,9 @@ reg_tests = [ (m64, "00000000 BLSR RAX, RBX", "c4e2f8f3cb"), + (m64, "00000000 BZHI RAX, RBX, RCX", + "c4e2f0f5c3"), + #### MMX/SSE/AVX operations #### |