diff options
Diffstat (limited to 'miasm')
| -rw-r--r-- | miasm/analysis/data_flow.py | 8 | ||||
| -rw-r--r-- | miasm/arch/mep/regs.py | 2 | ||||
| -rw-r--r-- | miasm/arch/x86/sem.py | 2 | ||||
| -rw-r--r-- | miasm/expression/expression_helper.py | 6 | ||||
| -rw-r--r-- | miasm/jitter/jitload.py | 2 | ||||
| -rw-r--r-- | miasm/loader/pe.py | 2 |
6 files changed, 11 insertions, 11 deletions
diff --git a/miasm/analysis/data_flow.py b/miasm/analysis/data_flow.py index 06453264..23d0b3dd 100644 --- a/miasm/analysis/data_flow.py +++ b/miasm/analysis/data_flow.py @@ -1910,7 +1910,7 @@ class State(object): def may_interfer(self, dsts, src): """ - Return True is @src may interfer with expressions in @dsts + Return True if @src may interfere with expressions in @dsts @dsts: Set of Expressions @src: expression to test """ @@ -2085,7 +2085,7 @@ class State(object): to_del = set() for node in list(classes.nodes()): if self.may_interfer(dsts, node): - # Interfer with known equivalence class + # Interfere with known equivalence class self.equivalence_classes.del_element(node) if node.is_id() or node.is_mem(): self.undefined.add(node) @@ -2137,7 +2137,7 @@ class State(object): undefined = set(node for node in self.undefined if node.is_id() or node.is_mem()) undefined.update(set(node for node in other.undefined if node.is_id() or node.is_mem())) # Should we compute interference between srcs and undefined ? - # Nop => should already interfer in other state + # Nop => should already interfere in other state components1 = classes1.get_classes() components2 = classes2.get_classes() @@ -2173,7 +2173,7 @@ class State(object): continue if common: # Intersection contains multiple nodes - # Here, common nodes don't interfer with any undefined + # Here, common nodes don't interfere with any undefined nodes_ok.update(common) out.append(common) diff = component1.difference(common) diff --git a/miasm/arch/mep/regs.py b/miasm/arch/mep/regs.py index b7fa2a78..be195b61 100644 --- a/miasm/arch/mep/regs.py +++ b/miasm/arch/mep/regs.py @@ -44,7 +44,7 @@ csr_names = ["PC", "LP", "SAR", "S3", "RPB", "RPE", "RPC", "HI", "LO", csr_exprs, csr_inits, csr_infos = gen_regs(csr_names, globals()) # Define aliases to control/special registers -PC = csr_exprs[0] # Program Conter. On MeP, it is the special register R0 +PC = csr_exprs[0] # Program Counter. On MeP, it is the special register R0 LP = csr_exprs[1] # Link Pointer. On MeP, it is the special register R1 SAR = csr_exprs[2] # Shift Amount Register. On MeP, it is the special register R2 RPB = csr_exprs[4] # Repeat Begin. On MeP, it is the special register R4 diff --git a/miasm/arch/x86/sem.py b/miasm/arch/x86/sem.py index ffa2641c..81e45e7e 100644 --- a/miasm/arch/x86/sem.py +++ b/miasm/arch/x86/sem.py @@ -5057,7 +5057,7 @@ def ldmxcsr(ir, instr, dst): def _select4(src, control): - # Implementation inspired from Intel Intrisics Guide + # Implementation inspired from Intel Intrinsics Guide # @control is already resolved (was an immediate) if control == 0: diff --git a/miasm/expression/expression_helper.py b/miasm/expression/expression_helper.py index 5bd2276d..81fc5c90 100644 --- a/miasm/expression/expression_helper.py +++ b/miasm/expression/expression_helper.py @@ -89,7 +89,7 @@ op_propag_cst = ['+', '*', '^', '&', '|', '>>', def is_pure_int(e): """ return True if expr is only composed with integers - [!] ExprCond returns True is src1 and src2 are integers + [!] ExprCond returns True if src1 and src2 are integers """ def modify_cond(e): if isinstance(e, m2_expr.ExprCond): @@ -344,7 +344,7 @@ class ExprRandom(object): compose_max_layer = 5 # Maximum size of memory address in bits memory_max_address_size = 32 - # Re-use already generated elements to mimic a more realistic behavior + # Reuse already generated elements to mimic a more realistic behavior reuse_element = True generated_elements = {} # (depth, size) -> [Expr] @@ -450,7 +450,7 @@ class ExprRandom(object): if not cls.perfect_tree: depth = random.randint(max(0, depth - 2), depth) - # Element re-use + # Element reuse if cls.reuse_element and random.choice([True, False]) and \ (depth, size) in cls.generated_elements: return random.choice(cls.generated_elements[(depth, size)]) diff --git a/miasm/jitter/jitload.py b/miasm/jitter/jitload.py index fb1c1f72..99e4429d 100644 --- a/miasm/jitter/jitload.py +++ b/miasm/jitter/jitload.py @@ -476,7 +476,7 @@ class Jitter(object): def get_exception(self): return self.cpu.get_exception() | self.vm.get_exception() - # commun functions + # common functions def get_c_str(self, addr, max_char=None): """Get C str from vm. @addr: address in memory diff --git a/miasm/loader/pe.py b/miasm/loader/pe.py index ea7cbc52..1252e70e 100644 --- a/miasm/loader/pe.py +++ b/miasm/loader/pe.py @@ -1110,7 +1110,7 @@ class DirDelay(CStruct): if isfromva(tmp_thunk[j].rva & 0x7FFFFFFF) == func: return isfromva(entry.firstthunk) + j * 4 else: - raise ValueError('unknown func tpye %r' % func) + raise ValueError('unknown func type %r' % func) def get_funcvirt(self, addr): rva = self.get_funcrva(addr) |