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-rw-r--r--test/analysis/data_flow.py90
-rw-r--r--test/analysis/depgraph.py66
-rw-r--r--test/analysis/dse.py8
-rw-r--r--test/arch/aarch64/arch.py6
-rw-r--r--test/arch/aarch64/unit/asm_test.py8
-rw-r--r--test/arch/arm/arch.py8
-rwxr-xr-xtest/arch/arm/sem.py6
-rw-r--r--test/arch/mips32/arch.py6
-rw-r--r--test/arch/mips32/unit/asm_test.py8
-rw-r--r--test/arch/msp430/arch.py6
-rw-r--r--test/arch/sh4/arch.py6
-rw-r--r--test/arch/x86/arch.py6
-rwxr-xr-xtest/arch/x86/sem.py16
-rw-r--r--test/arch/x86/unit/asm_test.py8
-rw-r--r--test/arch/x86/unit/mn_cdq.py38
-rwxr-xr-xtest/arch/x86/unit/mn_pushpop.py24
-rwxr-xr-xtest/arch/x86/unit/mn_strings.py12
-rw-r--r--test/core/asmblock.py26
-rwxr-xr-xtest/core/parse_asm.py12
-rw-r--r--test/core/sembuilder.py10
-rw-r--r--test/ir/translators/z3_ir.py12
21 files changed, 191 insertions, 191 deletions
diff --git a/test/analysis/data_flow.py b/test/analysis/data_flow.py
index d5b197d2..8204d9ce 100644
--- a/test/analysis/data_flow.py
+++ b/test/analysis/data_flow.py
@@ -1,11 +1,11 @@
 """ Test cases for dead code elimination"""
 from miasm2.expression.expression import ExprId, ExprInt, ExprAff, ExprMem
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from miasm2.analysis.data_flow import *
 from miasm2.ir.analysis import ira
 from miasm2.ir.ir import IRBlock, AssignBlock
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 a = ExprId("a", 32)
 b = ExprId("b", 32)
@@ -26,13 +26,13 @@ CST1 = ExprInt(0x11, 32)
 CST2 = ExprInt(0x12, 32)
 CST3 = ExprInt(0x13, 32)
 
-LBL0 = symbol_pool.add_location("lbl0", 0)
-LBL1 = symbol_pool.add_location("lbl1", 1)
-LBL2 = symbol_pool.add_location("lbl2", 2)
-LBL3 = symbol_pool.add_location("lbl3", 3)
-LBL4 = symbol_pool.add_location("lbl4", 4)
-LBL5 = symbol_pool.add_location("lbl5", 5)
-LBL6 = symbol_pool.add_location("lbl6", 6)
+LBL0 = loc_db.add_location("lbl0", 0)
+LBL1 = loc_db.add_location("lbl1", 1)
+LBL2 = loc_db.add_location("lbl2", 2)
+LBL3 = loc_db.add_location("lbl3", 3)
+LBL4 = loc_db.add_location("lbl4", 4)
+LBL5 = loc_db.add_location("lbl5", 5)
+LBL6 = loc_db.add_location("lbl6", 6)
 
 IRDst = ExprId('IRDst', 32)
 dummy = ExprId('dummy', 32)
@@ -68,9 +68,9 @@ class IRATest(ira):
 
     """Fake IRA class for tests"""
 
-    def __init__(self, symbol_pool=None):
+    def __init__(self, loc_db=None):
         arch = Arch()
-        super(IRATest, self).__init__(arch, 32, symbol_pool)
+        super(IRATest, self).__init__(arch, 32, loc_db)
         self.IRDst = IRDst
         self.ret_reg = r
 
@@ -79,7 +79,7 @@ class IRATest(ira):
 
 # graph 1 : Simple graph with dead and alive variables
 
-G1_IRA = IRATest(symbol_pool)
+G1_IRA = IRATest(loc_db)
 
 G1_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(b, CST2)]])
 G1_IRB1 = gen_irblock(LBL1, [[ExprAff(a, b)]])
@@ -91,7 +91,7 @@ G1_IRA.graph.add_uniq_edge(G1_IRB0.loc_key, G1_IRB1.loc_key)
 G1_IRA.graph.add_uniq_edge(G1_IRB1.loc_key, G1_IRB2.loc_key)
 
 # Expected output for graph 1
-G1_EXP_IRA = IRATest(symbol_pool)
+G1_EXP_IRA = IRATest(loc_db)
 
 G1_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAff(b, CST2)]])
 G1_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(a, b)]])
@@ -102,7 +102,7 @@ G1_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G1_EXP_IRB0, G1_EXP_IRB1,
 
 # graph 2 : Natural loop with dead variable
 
-G2_IRA = IRATest(symbol_pool)
+G2_IRA = IRATest(loc_db)
 
 G2_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(r, CST1)]])
 G2_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -115,7 +115,7 @@ G2_IRA.graph.add_uniq_edge(G2_IRB1.loc_key, G2_IRB2.loc_key)
 G2_IRA.graph.add_uniq_edge(G2_IRB1.loc_key, G2_IRB1.loc_key)
 
 # Expected output for graph 2
-G2_EXP_IRA = IRATest(symbol_pool)
+G2_EXP_IRA = IRATest(loc_db)
 
 G2_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAff(r, CST1)]])
 G2_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -126,7 +126,7 @@ G2_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G2_EXP_IRB0, G2_EXP_IRB1,
 
 # graph 3 : Natural loop with alive variables
 
-G3_IRA = IRATest(symbol_pool)
+G3_IRA = IRATest(loc_db)
 
 G3_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G3_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -139,7 +139,7 @@ G3_IRA.graph.add_uniq_edge(G3_IRB1.loc_key, G3_IRB2.loc_key)
 G3_IRA.graph.add_uniq_edge(G3_IRB1.loc_key, G3_IRB1.loc_key)
 
 # Expected output for graph 3
-G3_EXP_IRA = IRATest(symbol_pool)
+G3_EXP_IRA = IRATest(loc_db)
 
 G3_EXP_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G3_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -150,7 +150,7 @@ G3_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G3_EXP_IRB0, G3_EXP_IRB1,
 
 # graph 4 : If/else with dead variables
 
-G4_IRA = IRATest(symbol_pool)
+G4_IRA = IRATest(loc_db)
 
 G4_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G4_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -166,7 +166,7 @@ G4_IRA.graph.add_uniq_edge(G4_IRB1.loc_key, G4_IRB3.loc_key)
 G4_IRA.graph.add_uniq_edge(G4_IRB2.loc_key, G4_IRB3.loc_key)
 
 # Expected output for graph 4
-G4_EXP_IRA = IRATest(symbol_pool)
+G4_EXP_IRA = IRATest(loc_db)
 
 G4_EXP_IRB0 = gen_irblock(LBL0, [[]])
 G4_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -178,7 +178,7 @@ G4_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G4_EXP_IRB0, G4_EXP_IRB1,
 
 # graph 5 : Loop and If/else with dead variables
 
-G5_IRA = IRATest(symbol_pool)
+G5_IRA = IRATest(loc_db)
 
 G5_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G5_IRB1 = gen_irblock(LBL1, [[ExprAff(r, CST2)]])
@@ -199,7 +199,7 @@ G5_IRA.graph.add_uniq_edge(G5_IRB4.loc_key, G5_IRB5.loc_key)
 G5_IRA.graph.add_uniq_edge(G5_IRB4.loc_key, G5_IRB1.loc_key)
 
 # Expected output for graph 5
-G5_EXP_IRA = IRATest(symbol_pool)
+G5_EXP_IRA = IRATest(loc_db)
 
 G5_EXP_IRB0 = gen_irblock(LBL0, [[]])
 G5_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(r, CST2)]])
@@ -215,7 +215,7 @@ G5_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G5_EXP_IRB0, G5_EXP_IRB1,
 # graph 6 : Natural loop with dead variables symetric affectation
 # (a = b <-> b = a )
 
-G6_IRA = IRATest(symbol_pool)
+G6_IRA = IRATest(loc_db)
 
 G6_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G6_IRB1 = gen_irblock(LBL1, [[ExprAff(b, a)]])
@@ -231,7 +231,7 @@ G6_IRA.graph.add_uniq_edge(G6_IRB2.loc_key, G6_IRB1.loc_key)
 G6_IRA.graph.add_uniq_edge(G6_IRB2.loc_key, G6_IRB3.loc_key)
 
 # Expected output for graph 6
-G6_EXP_IRA = IRATest(symbol_pool)
+G6_EXP_IRA = IRATest(loc_db)
 
 G6_EXP_IRB0 = gen_irblock(LBL0, [[]])
 G6_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -243,7 +243,7 @@ G6_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G6_EXP_IRB0, G6_EXP_IRB1,
 
 # graph 7 : Double entry loop with dead variables
 
-G7_IRA = IRATest(symbol_pool)
+G7_IRA = IRATest(loc_db)
 
 G7_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(r, CST1)]])
 G7_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -261,7 +261,7 @@ G7_IRA.graph.add_uniq_edge(G7_IRB0.loc_key, G7_IRB2.loc_key)
 
 
 # Expected output for graph 7
-G7_EXP_IRA = IRATest(symbol_pool)
+G7_EXP_IRA = IRATest(loc_db)
 
 G7_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAff(r, CST1)]])
 G7_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -273,7 +273,7 @@ G7_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G7_EXP_IRB0, G7_EXP_IRB1,
 
 # graph 8 : Nested loops with dead variables
 
-G8_IRA = IRATest(symbol_pool)
+G8_IRA = IRATest(loc_db)
 
 G8_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(b, CST1)]])
 G8_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)]])
@@ -293,7 +293,7 @@ G8_IRA.graph.add_uniq_edge(G8_IRB3.loc_key, G8_IRB2.loc_key)
 
 # Expected output for graph 8
 
-G8_EXP_IRA = IRATest(symbol_pool)
+G8_EXP_IRA = IRATest(loc_db)
 
 G8_EXP_IRB0 = gen_irblock(LBL0, [[], []])
 G8_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -305,7 +305,7 @@ G8_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G8_EXP_IRB0, G8_EXP_IRB1,
 
 # graph 9 : Miultiple-exits loops with dead variables
 
-G9_IRA = IRATest(symbol_pool)
+G9_IRA = IRATest(loc_db)
 
 G9_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(b, CST1)]])
 G9_IRB1 = gen_irblock(LBL1, [[ExprAff(a, a+CST1)], [ExprAff(b, b+CST1)]])
@@ -328,7 +328,7 @@ G9_IRA.graph.add_uniq_edge(G9_IRB3.loc_key, G9_IRB4.loc_key)
 
 # Expected output for graph 9
 
-G9_EXP_IRA = IRATest(symbol_pool)
+G9_EXP_IRA = IRATest(loc_db)
 
 G9_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAff(b, CST1)]])
 G9_EXP_IRB1 = gen_irblock(LBL1, [[], [ExprAff(b, b+CST1)]])
@@ -343,7 +343,7 @@ G9_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G9_EXP_IRB0, G9_EXP_IRB1,
 # graph 10 : Natural loop with alive variables symetric affectation
 # (a = b <-> b = a )
 
-G10_IRA = IRATest(symbol_pool)
+G10_IRA = IRATest(loc_db)
 
 G10_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)]])
 G10_IRB1 = gen_irblock(LBL1, [[ExprAff(b, a)]])
@@ -359,7 +359,7 @@ G10_IRA.graph.add_uniq_edge(G10_IRB2.loc_key, G10_IRB1.loc_key)
 G10_IRA.graph.add_uniq_edge(G10_IRB2.loc_key, G10_IRB3.loc_key)
 
 # Expected output for graph 10
-G10_EXP_IRA = IRATest(symbol_pool)
+G10_EXP_IRA = IRATest(loc_db)
 
 G10_EXP_IRB0 = gen_irblock(LBL0, [[]])
 G10_EXP_IRB1 = gen_irblock(LBL1, [[]])
@@ -371,7 +371,7 @@ G10_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G10_EXP_IRB0, G10_EXP_IRB1,
 
 # graph 11 : If/Else conditions with alive variables
 
-G11_IRA = IRATest(symbol_pool)
+G11_IRA = IRATest(loc_db)
 
 G11_IRB0 = gen_irblock(LBL0, [[ExprAff(a, b)]])
 G11_IRB1 = gen_irblock(LBL1, [[ExprAff(b, a)]])
@@ -390,7 +390,7 @@ G11_IRA.graph.add_uniq_edge(G11_IRB1.loc_key, G11_IRB2.loc_key)
 
 
 # Expected output for graph 11
-G11_EXP_IRA = IRATest(symbol_pool)
+G11_EXP_IRA = IRATest(loc_db)
 
 G11_EXP_IRB0 = gen_irblock(LBL0, [[ExprAff(a, b)]])
 G11_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(b, a)]])
@@ -404,7 +404,7 @@ G11_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G11_EXP_IRB0, G11_EXP_IRB1,
 # graph 12 : Graph with multiple out points and useless definitions
 # of return register
 
-G12_IRA = IRATest(symbol_pool)
+G12_IRA = IRATest(loc_db)
 
 G12_IRB0 = gen_irblock(LBL0, [[ExprAff(r, CST1)], [ExprAff(a, CST2)]])
 G12_IRB1 = gen_irblock(LBL1, [[ExprAff(r, CST2)]])
@@ -423,7 +423,7 @@ G12_IRA.graph.add_uniq_edge(G12_IRB2.loc_key, G12_IRB4.loc_key)
 G12_IRA.graph.add_uniq_edge(G12_IRB4.loc_key, G12_IRB5.loc_key)
 
 # Expected output for graph 12
-G12_EXP_IRA = IRATest(symbol_pool)
+G12_EXP_IRA = IRATest(loc_db)
 
 G12_EXP_IRB0 = gen_irblock(LBL0, [[], []])
 G12_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(r, CST2)]])
@@ -439,7 +439,7 @@ G12_EXP_IRA.blocks = {irb.loc_key : irb for irb in [G12_EXP_IRB0, G12_EXP_IRB1,
 
 # graph 13 : Graph where a leaf has lost its son
 
-G13_IRA = IRATest(symbol_pool)
+G13_IRA = IRATest(loc_db)
 
 G13_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(b, CST2)]])
 G13_IRB1 = gen_irblock(LBL1, [[ExprAff(r, b)]])
@@ -457,7 +457,7 @@ G13_IRA.graph.add_uniq_edge(G13_IRB2.loc_key, G13_IRB3.loc_key)
 G13_IRA.graph.add_uniq_edge(G13_IRB4.loc_key, G13_IRB2.loc_key)
 
 # Expected output for graph 13
-G13_EXP_IRA = IRATest(symbol_pool)
+G13_EXP_IRA = IRATest(loc_db)
 
 G13_EXP_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(b, CST2)]])
 G13_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(r, b)]])
@@ -474,7 +474,7 @@ G13_EXP_IRA.blocks = {irb.loc_key: irb for irb in [G13_EXP_IRB0, G13_EXP_IRB1,
 # graph 14 : Graph where variable assigned multiple times in a block but still
 # useful in the end
 
-G14_IRA = IRATest(symbol_pool)
+G14_IRA = IRATest(loc_db)
 
 G14_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(c, a)],
                               [ExprAff(a, CST2)]])
@@ -485,7 +485,7 @@ G14_IRA.blocks = {irb.loc_key : irb for irb in [G14_IRB0, G14_IRB1]}
 G14_IRA.graph.add_uniq_edge(G14_IRB0.loc_key, G14_IRB1.loc_key)
 
 # Expected output for graph 1
-G14_EXP_IRA = IRATest(symbol_pool)
+G14_EXP_IRA = IRATest(loc_db)
 
 G14_EXP_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1)], [ExprAff(c, a)],
                                   [ExprAff(a, CST2)]])
@@ -496,7 +496,7 @@ G14_EXP_IRA.blocks = {irb.loc_key: irb for irb in [G14_EXP_IRB0, G14_EXP_IRB1]}
 # graph 15 : Graph where variable assigned multiple and read at the same time,
 # but useless
 
-G15_IRA = IRATest(symbol_pool)
+G15_IRA = IRATest(loc_db)
 
 G15_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST2)], [ExprAff(a, CST1),
                                                    ExprAff(b, a+CST2),
@@ -508,7 +508,7 @@ G15_IRA.blocks = {irb.loc_key : irb for irb in [G15_IRB0, G15_IRB1]}
 G15_IRA.graph.add_uniq_edge(G15_IRB0.loc_key, G15_IRB1.loc_key)
 
 # Expected output for graph 1
-G15_EXP_IRA = IRATest(symbol_pool)
+G15_EXP_IRA = IRATest(loc_db)
 
 G15_EXP_IRB0 = gen_irblock(LBL0, [[], [ExprAff(a, CST1)]])
 G15_EXP_IRB1 = gen_irblock(LBL1, [[ExprAff(r, a)]])
@@ -517,7 +517,7 @@ G15_EXP_IRA.blocks = {irb.loc_key: irb for irb in [G15_EXP_IRB0, G15_EXP_IRB1]}
 
 # graph 16 : Graph where variable assigned multiple times in the same bloc
 
-G16_IRA = IRATest(symbol_pool)
+G16_IRA = IRATest(loc_db)
 
 G16_IRB0 = gen_irblock(LBL0, [[ExprAff(a, CST1), ExprAff(b, CST2),
                                ExprAff(c, CST3)], [ExprAff(a, c+CST1),
@@ -533,7 +533,7 @@ G16_IRA.graph.add_uniq_edge(G16_IRB1.loc_key, G16_IRB2.loc_key)
 G16_IRA.blocks = {irb.loc_key : irb for irb in [G16_IRB0, G16_IRB1]}
 
 # Expected output for graph 1
-G16_EXP_IRA = IRATest(symbol_pool)
+G16_EXP_IRA = IRATest(loc_db)
 
 G16_EXP_IRB0 = gen_irblock(LBL0, [[ExprAff(c, CST3)], [ExprAff(a, c + CST1),
                                                        ExprAff(b, c + CST2)]])
@@ -543,7 +543,7 @@ G16_EXP_IRA.blocks = {irb.loc_key: irb for irb in [G16_EXP_IRB0, G16_EXP_IRB1]}
 
 # graph 17 : parallel ir
 
-G17_IRA = IRATest(symbol_pool)
+G17_IRA = IRATest(loc_db)
 
 G17_IRB0 = gen_irblock(LBL0, [[ExprAff(a, a*b),
                                ExprAff(b, c),
@@ -604,7 +604,7 @@ G17_IRA.blocks = {irb.loc_key : irb for irb in [G17_IRB0]}
 G17_IRA.graph.add_node(G17_IRB0.loc_key)
 
 # Expected output for graph 17
-G17_EXP_IRA = IRATest(symbol_pool)
+G17_EXP_IRA = IRATest(loc_db)
 
 G17_EXP_IRB0 = gen_irblock(LBL0, [[],
 
diff --git a/test/analysis/depgraph.py b/test/analysis/depgraph.py
index 86857182..a7d3a148 100644
--- a/test/analysis/depgraph.py
+++ b/test/analysis/depgraph.py
@@ -1,7 +1,7 @@
 """Regression test module for DependencyGraph"""
 from miasm2.expression.expression import ExprId, ExprInt, ExprAff, ExprCond, \
     ExprLoc, LocKey
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from miasm2.ir.analysis import ira
 from miasm2.ir.ir import IRBlock, AssignBlock
 from miasm2.core.graph import DiGraph
@@ -10,7 +10,7 @@ from itertools import count
 from pdb import pm
 import re
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 EMULATION = True
 try:
@@ -44,13 +44,13 @@ CST33 = ExprInt(0x33, 32)
 CST35 = ExprInt(0x35, 32)
 CST37 = ExprInt(0x37, 32)
 
-LBL0 = symbol_pool.add_location("lbl0", 0)
-LBL1 = symbol_pool.add_location("lbl1", 1)
-LBL2 = symbol_pool.add_location("lbl2", 2)
-LBL3 = symbol_pool.add_location("lbl3", 3)
-LBL4 = symbol_pool.add_location("lbl4", 4)
-LBL5 = symbol_pool.add_location("lbl5", 5)
-LBL6 = symbol_pool.add_location("lbl6", 6)
+LBL0 = loc_db.add_location("lbl0", 0)
+LBL1 = loc_db.add_location("lbl1", 1)
+LBL2 = loc_db.add_location("lbl2", 2)
+LBL3 = loc_db.add_location("lbl3", 3)
+LBL4 = loc_db.add_location("lbl4", 4)
+LBL5 = loc_db.add_location("lbl5", 5)
+LBL6 = loc_db.add_location("lbl6", 6)
 
 def gen_irblock(label, exprs_list):
     """ Returns an IRBlock.
@@ -90,9 +90,9 @@ class IRATest(ira):
 
     """Fake IRA class for tests"""
 
-    def __init__(self, symbol_pool=None):
+    def __init__(self, loc_db=None):
         arch = Arch()
-        super(IRATest, self).__init__(arch, 32, symbol_pool)
+        super(IRATest, self).__init__(arch, 32, loc_db)
         self.IRDst = PC
         self.ret_reg = R
 
@@ -116,7 +116,7 @@ def bloc2graph(irgraph, label=False, lines=True):
     out_blocks = []
     for label in irgraph.graph.nodes():
         if isinstance(label, LocKey):
-            label_name = irgraph.symbol_pool.loc_key_to_name(label)
+            label_name = irgraph.loc_db.loc_key_to_name(label)
         else:
             label_name = str(label)
 
@@ -156,11 +156,11 @@ def bloc2graph(irgraph, label=False, lines=True):
     # Generate links
     for src, dst in irgraph.graph.edges():
             if isinstance(src, LocKey):
-                src_name = irgraph.symbol_pool.loc_key_to_name(src)
+                src_name = irgraph.loc_db.loc_key_to_name(src)
             else:
                 src_name = str(src)
             if isinstance(dst, LocKey):
-                dst_name = irgraph.symbol_pool.loc_key_to_name(dst)
+                dst_name = irgraph.loc_db.loc_key_to_name(dst)
             else:
                 dst_name = str(dst)
 
@@ -189,7 +189,7 @@ def dg2graph(graph, label=False, lines=True):
     out_blocks = []
     for node in graph.nodes():
         if isinstance(node, DependencyNode):
-            name = symbol_pool.loc_key_to_name(node.loc_key)
+            name = loc_db.loc_key_to_name(node.loc_key)
             node_name = "%s %s %s" % (name,
                                        node.element,
                                        node.line_nb)
@@ -232,7 +232,7 @@ DNC3 = DependencyNode(LBL1, C, 0)
 
 # graph 1
 
-G1_IRA = IRATest(symbol_pool)
+G1_IRA = IRATest(loc_db)
 
 G1_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G1_IRB1 = gen_irblock(LBL1, [[ExprAff(B, C)]])
@@ -245,7 +245,7 @@ G1_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G1_IRB0, G1_IRB1, G1_IRB2]]
 
 # graph 2
 
-G2_IRA = IRATest(symbol_pool)
+G2_IRA = IRATest(loc_db)
 
 G2_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G2_IRB1 = gen_irblock(LBL1, [[ExprAff(B, CST2)]])
@@ -259,7 +259,7 @@ G2_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G2_IRB0, G2_IRB1, G2_IRB2]]
 
 # graph 3
 
-G3_IRA = IRATest(symbol_pool)
+G3_IRA = IRATest(loc_db)
 
 G3_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G3_IRB1 = gen_irblock(LBL1, [[ExprAff(B, CST2)]])
@@ -276,7 +276,7 @@ G3_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G3_IRB0, G3_IRB1,
 
 # graph 4
 
-G4_IRA = IRATest(symbol_pool)
+G4_IRA = IRATest(loc_db)
 
 G4_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G4_IRB1 = gen_irblock(LBL1, [[ExprAff(C, C + CST2)],
@@ -295,7 +295,7 @@ G4_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G4_IRB0, G4_IRB1, G4_IRB2]]
 
 # graph 5
 
-G5_IRA = IRATest(symbol_pool)
+G5_IRA = IRATest(loc_db)
 
 G5_IRB0 = gen_irblock(LBL0, [[ExprAff(B, CST1)]])
 G5_IRB1 = gen_irblock(LBL1, [[ExprAff(B, B + CST2)],
@@ -313,7 +313,7 @@ G5_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G5_IRB0, G5_IRB1, G5_IRB2]]
 
 # graph 6
 
-G6_IRA = IRATest(symbol_pool)
+G6_IRA = IRATest(loc_db)
 
 G6_IRB0 = gen_irblock(LBL0, [[ExprAff(B, CST1)]])
 G6_IRB1 = gen_irblock(LBL1, [[ExprAff(A, B)]])
@@ -325,7 +325,7 @@ G6_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G6_IRB0, G6_IRB1]])
 
 # graph 7
 
-G7_IRA = IRATest(symbol_pool)
+G7_IRA = IRATest(loc_db)
 
 G7_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G7_IRB1 = gen_irblock(LBL1, [[ExprAff(B, C)], [ExprAff(A, B)]])
@@ -339,7 +339,7 @@ G7_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G7_IRB0, G7_IRB1, G7_IRB2]]
 
 # graph 8
 
-G8_IRA = IRATest(symbol_pool)
+G8_IRA = IRATest(loc_db)
 
 G8_IRB0 = gen_irblock(LBL0, [[ExprAff(C, CST1)]])
 G8_IRB1 = gen_irblock(LBL1, [[ExprAff(B, C)], [ExprAff(C, D)]])
@@ -355,7 +355,7 @@ G8_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G8_IRB0, G8_IRB1, G8_IRB2]]
 
 # graph 10
 
-G10_IRA = IRATest(symbol_pool)
+G10_IRA = IRATest(loc_db)
 
 G10_IRB1 = gen_irblock(LBL1, [[ExprAff(B, B + CST2)]])
 G10_IRB2 = gen_irblock(LBL2, [[ExprAff(A, B)]])
@@ -367,7 +367,7 @@ G10_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G10_IRB1, G10_IRB2]])
 
 # graph 11
 
-G11_IRA = IRATest(symbol_pool)
+G11_IRA = IRATest(loc_db)
 
 G11_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1),
                                ExprAff(B, CST2)]])
@@ -383,7 +383,7 @@ G11_IRA.blocks = dict([(irb.loc_key, irb)
 
 # graph 12
 
-G12_IRA = IRATest(symbol_pool)
+G12_IRA = IRATest(loc_db)
 
 G12_IRB0 = gen_irblock(LBL0, [[ExprAff(B, CST1)]])
 G12_IRB1 = gen_irblock(LBL1, [[ExprAff(A, B)], [ExprAff(B, B + CST2)]])
@@ -399,7 +399,7 @@ G12_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G12_IRB0, G12_IRB1,
 
 # graph 13
 
-G13_IRA = IRATest(symbol_pool)
+G13_IRA = IRATest(loc_db)
 
 G13_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)],
                               #[ExprAff(B, A)],
@@ -427,7 +427,7 @@ G13_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G13_IRB0, G13_IRB1,
 
 # graph 14
 
-G14_IRA = IRATest(symbol_pool)
+G14_IRA = IRATest(loc_db)
 
 G14_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)],
                               [ExprAff(G14_IRA.IRDst,
@@ -457,7 +457,7 @@ G14_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G14_IRB0, G14_IRB1,
 
 # graph 16
 
-G15_IRA = IRATest(symbol_pool)
+G15_IRA = IRATest(loc_db)
 
 G15_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)]])
 G15_IRB1 = gen_irblock(LBL1, [[ExprAff(D, A + B)],
@@ -474,7 +474,7 @@ G15_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G15_IRB0, G15_IRB1,
 
 # graph 16
 
-G16_IRA = IRATest(symbol_pool)
+G16_IRA = IRATest(loc_db)
 
 G16_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1)]])
 G16_IRB1 = gen_irblock(LBL1, [[ExprAff(R, D)]])
@@ -498,7 +498,7 @@ G16_IRA.blocks = dict([(irb.loc_key, irb) for irb in [G16_IRB0, G16_IRB1,
 
 # graph 17
 
-G17_IRA = IRATest(symbol_pool)
+G17_IRA = IRATest(loc_db)
 
 G17_IRB0 = gen_irblock(LBL0, [[ExprAff(A, CST1),
                                ExprAff(D, CST2)]])
@@ -642,7 +642,7 @@ def flatNode(node):
             element = int(node.element.arg)
         else:
             RuntimeError("Unsupported type '%s'" % type(enode.element))
-        name = symbol_pool.loc_key_to_name(node.loc_key)
+        name = loc_db.loc_key_to_name(node.loc_key)
         return (name,
                 element,
                 node.line_nb)
@@ -741,7 +741,7 @@ def match_results(resultsA, resultsB, nodes):
 def get_flat_init_depnodes(depnodes):
     out = []
     for node in depnodes:
-        name = symbol_pool.loc_key_to_name(node.loc_key)
+        name = loc_db.loc_key_to_name(node.loc_key)
         out.append((name,
                     node.element.name,
                     node.line_nb,
diff --git a/test/analysis/dse.py b/test/analysis/dse.py
index 4367f6f7..56de4d4e 100644
--- a/test/analysis/dse.py
+++ b/test/analysis/dse.py
@@ -69,17 +69,17 @@ class DSETest(object):
 
     def asm(self):
         mn_x86 = self.machine.mn
-        blocks, symbol_pool = parse_asm.parse_txt(
+        blocks, loc_db = parse_asm.parse_txt(
             mn_x86,
             self.arch_attrib,
             self.TXT,
-            symbol_pool=self.myjit.ir_arch.symbol_pool
+            loc_db=self.myjit.ir_arch.loc_db
         )
 
         # fix shellcode addr
-        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
+        loc_db.set_offset(loc_db.getby_name("main"), 0x0)
         output = StrPatchwork()
-        patches = asm_resolve_final(mn_x86, blocks, symbol_pool)
+        patches = asm_resolve_final(mn_x86, blocks, loc_db)
         for offset, raw in patches.items():
             output[offset] = raw
 
diff --git a/test/arch/aarch64/arch.py b/test/arch/aarch64/arch.py
index a6aa7ba5..cba175e6 100644
--- a/test/arch/aarch64/arch.py
+++ b/test/arch/aarch64/arch.py
@@ -2,9 +2,9 @@ import sys
 import time
 from pdb import pm
 from miasm2.arch.aarch64.arch import *
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 reg_tests_aarch64 = [
     ("XXXXXXXX    MOV        W1, WZR",
@@ -1814,7 +1814,7 @@ for s, l in reg_tests_aarch64[:]:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_aarch64.fromstring(s, symbol_pool, 'l')
+    l = mn_aarch64.fromstring(s, loc_db, 'l')
     assert(str(l) == s)
     a = mn_aarch64.asm(l)
     print [x for x in a]
diff --git a/test/arch/aarch64/unit/asm_test.py b/test/arch/aarch64/unit/asm_test.py
index 437a8056..d3221ec0 100644
--- a/test/arch/aarch64/unit/asm_test.py
+++ b/test/arch/aarch64/unit/asm_test.py
@@ -22,12 +22,12 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks, symbol_pool = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT,
-                                                  symbol_pool = self.myjit.ir_arch.symbol_pool)
+        blocks, loc_db = parse_asm.parse_txt(mn_aarch64, 'l', self.TXT,
+                                                  loc_db = self.myjit.ir_arch.loc_db)
         # fix shellcode addr
-        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
+        loc_db.set_offset(loc_db.getby_name("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_aarch64, blocks, symbol_pool)
+        patches = asmblock.asm_resolve_final(mn_aarch64, blocks, loc_db)
         for offset, raw in patches.items():
             s[offset] = raw
 
diff --git a/test/arch/arm/arch.py b/test/arch/arm/arch.py
index f69bb104..3550a816 100644
--- a/test/arch/arm/arch.py
+++ b/test/arch/arm/arch.py
@@ -1,10 +1,10 @@
 import time
 from miasm2.arch.arm.arch import *
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from pdb import pm
 
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 def h2i(s):
     return s.replace(' ', '').decode('hex')
@@ -233,7 +233,7 @@ for s, l in reg_tests_arm:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_arm.fromstring(s, symbol_pool, 'l')
+    l = mn_arm.fromstring(s, loc_db, 'l')
     assert(str(l) == s)
     a = mn_arm.asm(l)
     print [x for x in a]
@@ -681,7 +681,7 @@ for s, l in reg_tests_armt:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_armt.fromstring(s, symbol_pool, 'l')
+    l = mn_armt.fromstring(s, loc_db, 'l')
     assert(str(l) == s)
     print 'Asm..', l
     a = mn_armt.asm(l)
diff --git a/test/arch/arm/sem.py b/test/arch/arm/sem.py
index 05d26f5c..252e5954 100755
--- a/test/arch/arm/sem.py
+++ b/test/arch/arm/sem.py
@@ -9,13 +9,13 @@ from miasm2.arch.arm.arch import mn_arm as mn
 from miasm2.arch.arm.sem import ir_arml as ir_arch
 from miasm2.arch.arm.regs import *
 from miasm2.expression.expression import *
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from pdb import pm
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 EXCLUDE_REGS = set([ir_arch().IRDst])
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 def M(addr):
     return ExprMem(ExprInt(addr, 16), 16)
@@ -26,7 +26,7 @@ def compute(asm, inputstate={}, debug=False):
     sympool.update({k: ExprInt(v, k.size) for k, v in inputstate.iteritems()})
     interm = ir_arch()
     symexec = SymbolicExecutionEngine(interm, sympool)
-    instr = mn.fromstring(asm, symbol_pool, "l")
+    instr = mn.fromstring(asm, loc_db, "l")
     code = mn.asm(instr)[0]
     instr = mn.dis(code, "l")
     instr.offset = inputstate.get(PC, 0)
diff --git a/test/arch/mips32/arch.py b/test/arch/mips32/arch.py
index 6fc36d13..1cbb554d 100644
--- a/test/arch/mips32/arch.py
+++ b/test/arch/mips32/arch.py
@@ -1,10 +1,10 @@
 import time
 from pdb import pm
 
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from miasm2.arch.mips32.arch import *
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 reg_tests_mips32 = [
     ("004496D8    ADDU       GP, GP, T9",
@@ -228,7 +228,7 @@ for s, l in reg_tests_mips32:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_mips32.fromstring(s, symbol_pool, 'b')
+    l = mn_mips32.fromstring(s, loc_db, 'b')
     assert(str(l) == s)
     a = mn_mips32.asm(l, 'b')
     print [x for x in a]
diff --git a/test/arch/mips32/unit/asm_test.py b/test/arch/mips32/unit/asm_test.py
index a2203783..be26bf49 100644
--- a/test/arch/mips32/unit/asm_test.py
+++ b/test/arch/mips32/unit/asm_test.py
@@ -24,12 +24,12 @@ class Asm_Test(object):
         self.check()
 
     def asm(self):
-        blocks, symbol_pool = parse_asm.parse_txt(mn_mips32, 'l', self.TXT,
-                                                  symbol_pool=self.myjit.ir_arch.symbol_pool)
+        blocks, loc_db = parse_asm.parse_txt(mn_mips32, 'l', self.TXT,
+                                                  loc_db=self.myjit.ir_arch.loc_db)
         # fix shellcode addr
-        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
+        loc_db.set_offset(loc_db.getby_name("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_mips32, blocks, symbol_pool)
+        patches = asmblock.asm_resolve_final(mn_mips32, blocks, loc_db)
         for offset, raw in patches.items():
             s[offset] = raw
 
diff --git a/test/arch/msp430/arch.py b/test/arch/msp430/arch.py
index 08e5bdae..91de95b3 100644
--- a/test/arch/msp430/arch.py
+++ b/test/arch/msp430/arch.py
@@ -1,9 +1,9 @@
 import time
 from pdb import pm
 from miasm2.arch.msp430.arch import *
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 def h2i(s):
     return s.replace(' ', '').decode('hex')
@@ -95,7 +95,7 @@ for s, l in reg_tests_msp:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_msp430.fromstring(s, symbol_pool, None)
+    l = mn_msp430.fromstring(s, loc_db, None)
     assert(str(l) == s)
     a = mn_msp430.asm(l)
     print [x for x in a]
diff --git a/test/arch/sh4/arch.py b/test/arch/sh4/arch.py
index 9162fdbc..f744b215 100644
--- a/test/arch/sh4/arch.py
+++ b/test/arch/sh4/arch.py
@@ -2,9 +2,9 @@ import time
 from pdb import pm
 from sys import stderr
 from miasm2.arch.sh4.arch import *
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 def h2i(s):
     return s.replace(' ', '').decode('hex')
@@ -398,7 +398,7 @@ for s, l in reg_tests_sh4:
     print s
     print mn
     assert(str(mn) == s)
-    l = mn_sh4.fromstring(s, symbol_pool, None)
+    l = mn_sh4.fromstring(s, loc_db, None)
     assert(str(l) == s)
     a = mn_sh4.asm(l)
     print [x for x in a]
diff --git a/test/arch/x86/arch.py b/test/arch/x86/arch.py
index 1865ceba..43e973e1 100644
--- a/test/arch/x86/arch.py
+++ b/test/arch/x86/arch.py
@@ -5,9 +5,9 @@ from miasm2.arch.x86.arch import mn_x86, deref_mem_ad, \
     base_expr, rmarg, print_size
 from miasm2.arch.x86.sem import ir_x86_16, ir_x86_32, ir_x86_64
 from miasm2.core.bin_stream import bin_stream_str
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 mylabel16 = m2_expr.ExprId('mylabel16', 16)
 mylabel32 = m2_expr.ExprId('mylabel32', 32)
@@ -3063,7 +3063,7 @@ for mode, s, l, in reg_tests:
     print mn
     assert(str(mn).strip() == s)
     print 'fromstring', repr(s)
-    l = mn_x86.fromstring(s, symbol_pool, mode)
+    l = mn_x86.fromstring(s, loc_db, mode)
     print 'str args', [(str(x), x.size) for x in l.args]
     assert(str(l).strip(' ') == s)
     a = mn_x86.asm(l)
diff --git a/test/arch/x86/sem.py b/test/arch/x86/sem.py
index baa05341..23b22245 100755
--- a/test/arch/x86/sem.py
+++ b/test/arch/x86/sem.py
@@ -14,13 +14,13 @@ from miasm2.arch.x86.regs import *
 from miasm2.expression.expression import *
 from miasm2.expression.simplifications      import expr_simp
 from miasm2.core import parse_asm, asmblock
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 
 
 logging.getLogger('cpuhelper').setLevel(logging.ERROR)
 EXCLUDE_REGS = set([ir_32().IRDst, ir_64().IRDst])
 
-symbol_pool = AsmSymbolPool()
+loc_db = LocationDB()
 
 m32 = 32
 m64 = 64
@@ -38,7 +38,7 @@ def symb_exec(lbl, interm, inputstate, debug):
             if k not in EXCLUDE_REGS and regs_init.get(k, None) != v}
 
 def compute(ir, mode, asm, inputstate={}, debug=False):
-    instr = mn.fromstring(asm, symbol_pool, mode)
+    instr = mn.fromstring(asm, loc_db, mode)
     code = mn.asm(instr)[0]
     instr = mn.dis(code, mode)
     instr.offset = inputstate.get(EIP, 0)
@@ -48,11 +48,11 @@ def compute(ir, mode, asm, inputstate={}, debug=False):
 
 
 def compute_txt(ir, mode, txt, inputstate={}, debug=False):
-    asmcfg, symbol_pool = parse_asm.parse_txt(mn, mode, txt)
-    symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
-    patches = asmblock.asm_resolve_final(mn, asmcfg, symbol_pool)
-    interm = ir(symbol_pool)
-    lbl = symbol_pool.getby_name("main")
+    asmcfg, loc_db = parse_asm.parse_txt(mn, mode, txt)
+    loc_db.set_offset(loc_db.getby_name("main"), 0x0)
+    patches = asmblock.asm_resolve_final(mn, asmcfg, loc_db)
+    interm = ir(loc_db)
+    lbl = loc_db.getby_name("main")
     for bbl in asmcfg.blocks:
         interm.add_block(bbl)
     return symb_exec(lbl, interm, inputstate, debug)
diff --git a/test/arch/x86/unit/asm_test.py b/test/arch/x86/unit/asm_test.py
index 4b802606..e626768d 100644
--- a/test/arch/x86/unit/asm_test.py
+++ b/test/arch/x86/unit/asm_test.py
@@ -40,12 +40,12 @@ class Asm_Test(object):
         assert(self.myjit.pc == self.ret_addr)
 
     def asm(self):
-        blocks, symbol_pool = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT,
-                                                  symbol_pool = self.myjit.ir_arch.symbol_pool)
+        blocks, loc_db = parse_asm.parse_txt(mn_x86, self.arch_attrib, self.TXT,
+                                                  loc_db = self.myjit.ir_arch.loc_db)
         # fix shellcode addr
-        symbol_pool.set_offset(symbol_pool.getby_name("main"), 0x0)
+        loc_db.set_offset(loc_db.getby_name("main"), 0x0)
         s = StrPatchwork()
-        patches = asmblock.asm_resolve_final(mn_x86, blocks, symbol_pool)
+        patches = asmblock.asm_resolve_final(mn_x86, blocks, loc_db)
         for offset, raw in patches.items():
             s[offset] = raw
 
diff --git a/test/arch/x86/unit/mn_cdq.py b/test/arch/x86/unit/mn_cdq.py
index 15b73913..947b40bb 100644
--- a/test/arch/x86/unit/mn_cdq.py
+++ b/test/arch/x86/unit/mn_cdq.py
@@ -10,7 +10,7 @@ class Test_CBW_16(Asm_Test_16):
     MYSTRING = "test CBW 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -31,7 +31,7 @@ class Test_CBW_16_signed(Asm_Test_16):
     MYSTRING = "test CBW 16 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654381
@@ -52,7 +52,7 @@ class Test_CBW_32(Asm_Test_32):
     MYSTRING = "test CBW 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -73,7 +73,7 @@ class Test_CBW_32_signed(Asm_Test_32):
     MYSTRING = "test CBW 32 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654381
@@ -94,7 +94,7 @@ class Test_CDQ_32(Asm_Test_32):
     MYSTRING = "test cdq 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x77654321
@@ -115,7 +115,7 @@ class Test_CDQ_32_signed(Asm_Test_32):
     MYSTRING = "test cdq 32 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -136,7 +136,7 @@ class Test_CDQ_64(Asm_Test_64):
     MYSTRING = "test cdq 64"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567877654321
@@ -157,7 +157,7 @@ class Test_CDQ_64_signed(Asm_Test_64):
     MYSTRING = "test cdq 64 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567887654321
@@ -178,7 +178,7 @@ class Test_CDQE_64(Asm_Test_64):
     MYSTRING = "test cdq 64"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567877654321
@@ -199,7 +199,7 @@ class Test_CDQE_64_signed(Asm_Test_64):
     MYSTRING = "test cdq 64 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567887654321
@@ -220,7 +220,7 @@ class Test_CWD_32(Asm_Test_32):
     MYSTRING = "test cdq 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -241,7 +241,7 @@ class Test_CWD_32_signed(Asm_Test_32):
     MYSTRING = "test cdq 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87658321
@@ -262,7 +262,7 @@ class Test_CWD_32(Asm_Test_32):
     MYSTRING = "test cdq 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -283,7 +283,7 @@ class Test_CWDE_32(Asm_Test_32):
     MYSTRING = "test cwde 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.EAX = 0x87654321
@@ -304,7 +304,7 @@ class Test_CWDE_32_signed(Asm_Test_32):
     MYSTRING = "test cwde 32 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x87658321
@@ -325,7 +325,7 @@ class Test_CWDE_64(Asm_Test_64):
     MYSTRING = "test cwde 64"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567887654321
@@ -346,7 +346,7 @@ class Test_CWDE_64_signed(Asm_Test_64):
     MYSTRING = "test cwde 64 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567887658321
@@ -367,7 +367,7 @@ class Test_CQO_64(Asm_Test_64):
     MYSTRING = "test cwde 64"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x1234567887654321
@@ -388,7 +388,7 @@ class Test_CQO_64_signed(Asm_Test_64):
     MYSTRING = "test cwde 64 signed"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.myjit.cpu.RAX = 0x8234567887658321
diff --git a/test/arch/x86/unit/mn_pushpop.py b/test/arch/x86/unit/mn_pushpop.py
index bed70ea3..6e9005ca 100755
--- a/test/arch/x86/unit/mn_pushpop.py
+++ b/test/arch/x86/unit/mn_pushpop.py
@@ -21,7 +21,7 @@ class Test_PUSHAD_32(Asm_Test_32):
     MYSTRING = "test pushad 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -48,7 +48,7 @@ class Test_PUSHA_32(Asm_Test_32):
     MYSTRING = "test pusha 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -75,7 +75,7 @@ class Test_PUSHA_16(Asm_Test_16):
     MYSTRING = "test pusha 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -102,7 +102,7 @@ class Test_PUSHAD_16(Asm_Test_16):
     MYSTRING = "test pushad 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -129,7 +129,7 @@ class Test_PUSH_mode32_32(Asm_Test_32):
     MYSTRING = "test push mode32 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -152,7 +152,7 @@ class Test_PUSH_mode32_16(Asm_Test_32):
     MYSTRING = "test push mode32 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -175,7 +175,7 @@ class Test_PUSH_mode16_16(Asm_Test_16):
     MYSTRING = "test push mode16 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -198,7 +198,7 @@ class Test_PUSH_mode16_32(Asm_Test_16):
     MYSTRING = "test push mode16 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         init_regs(self)
@@ -221,7 +221,7 @@ class Test_POP_mode32_32(Asm_Test_32):
     MYSTRING = "test pop mode32 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x11223344
@@ -243,7 +243,7 @@ class Test_POP_mode32_16(Asm_Test_32):
     MYSTRING = "test pop mode32 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x1122
@@ -265,7 +265,7 @@ class Test_POP_mode16_16(Asm_Test_16):
     MYSTRING = "test pop mode16 16"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x1122
@@ -287,7 +287,7 @@ class Test_POP_mode16_32(Asm_Test_16):
     MYSTRING = "test pop mode16 32"
 
     def prepare(self):
-        self.myjit.ir_arch.symbol_pool.add_location("lbl_ret", self.ret_addr)
+        self.myjit.ir_arch.loc_db.add_location("lbl_ret", self.ret_addr)
 
     def test_init(self):
         self.value = 0x11223344
diff --git a/test/arch/x86/unit/mn_strings.py b/test/arch/x86/unit/mn_strings.py
index 44da0a70..a6facd08 100755
--- a/test/arch/x86/unit/mn_strings.py
+++ b/test/arch/x86/unit/mn_strings.py
@@ -21,8 +21,8 @@ class Test_SCAS(Asm_Test_32):
 
     def check(self):
         assert(self.myjit.cpu.ECX == len(self.MYSTRING))
-        mystr = self.myjit.ir_arch.symbol_pool.getby_name('mystr')
-        assert(self.myjit.cpu.EDI == self.myjit.ir_arch.symbol_pool.loc_key_to_offset(mystr) + len(self.MYSTRING)+1)
+        mystr = self.myjit.ir_arch.loc_db.getby_name('mystr')
+        assert(self.myjit.cpu.EDI == self.myjit.ir_arch.loc_db.loc_key_to_offset(mystr) + len(self.MYSTRING)+1)
 
 
 class Test_MOVS(Asm_Test_32):
@@ -43,10 +43,10 @@ class Test_MOVS(Asm_Test_32):
 
     def check(self):
         assert(self.myjit.cpu.ECX == 0)
-        buffer = self.myjit.ir_arch.symbol_pool.getby_name('buffer')
-        assert(self.myjit.cpu.EDI == self.myjit.ir_arch.symbol_pool.loc_key_to_offset(buffer) + len(self.MYSTRING))
-        mystr = self.myjit.ir_arch.symbol_pool.getby_name('mystr')
-        assert(self.myjit.cpu.ESI == self.myjit.ir_arch.symbol_pool.loc_key_to_offset(mystr) + len(self.MYSTRING))
+        buffer = self.myjit.ir_arch.loc_db.getby_name('buffer')
+        assert(self.myjit.cpu.EDI == self.myjit.ir_arch.loc_db.loc_key_to_offset(buffer) + len(self.MYSTRING))
+        mystr = self.myjit.ir_arch.loc_db.getby_name('mystr')
+        assert(self.myjit.cpu.ESI == self.myjit.ir_arch.loc_db.loc_key_to_offset(mystr) + len(self.MYSTRING))
 
 
 if __name__ == "__main__":
diff --git a/test/core/asmblock.py b/test/core/asmblock.py
index 0e965bfd..465697f4 100644
--- a/test/core/asmblock.py
+++ b/test/core/asmblock.py
@@ -105,7 +105,7 @@ open("graph2.dot", "w").write(asmcfg.dot())
 # Test helper methods
 ## loc_key_to_block should always be updated
 assert asmcfg.loc_key_to_block(first_block.loc_key) == first_block
-testlabel = mdis.symbol_pool.getby_name_create("testlabel")
+testlabel = mdis.loc_db.getby_name_create("testlabel")
 my_block = AsmBlock(testlabel)
 asmcfg.add_block(my_block)
 assert len(asmcfg) == 3
@@ -116,7 +116,7 @@ assert asmcfg.loc_key_to_block(my_block.loc_key) == my_block
 assert len(list(asmcfg.get_bad_blocks())) == 0
 assert len(list(asmcfg.get_bad_blocks_predecessors())) == 0
 ### Add a bad block, not linked
-testlabel_bad = mdis.symbol_pool.getby_name_create("testlabel_bad")
+testlabel_bad = mdis.loc_db.getby_name_create("testlabel_bad")
 my_bad_block = AsmBlockBad(testlabel_bad)
 asmcfg.add_block(my_bad_block)
 assert list(asmcfg.get_bad_blocks()) == [my_bad_block]
@@ -135,7 +135,7 @@ assert len(list(asmcfg.get_bad_blocks_predecessors(strict=True))) == 0
 ## Sanity check
 asmcfg.sanity_check()
 ### Next on itself
-testlabel_nextitself = mdis.symbol_pool.getby_name_create("testlabel_nextitself")
+testlabel_nextitself = mdis.loc_db.getby_name_create("testlabel_nextitself")
 my_block_ni = AsmBlock(testlabel_nextitself)
 my_block_ni.bto.add(AsmConstraintNext(my_block_ni.loc_key))
 asmcfg.add_block(my_block_ni)
@@ -149,11 +149,11 @@ assert error_raised
 asmcfg.del_block(my_block_ni)
 asmcfg.sanity_check()
 ### Multiple next on the same node
-testlabel_target = mdis.symbol_pool.getby_name_create("testlabel_target")
+testlabel_target = mdis.loc_db.getby_name_create("testlabel_target")
 my_block_target = AsmBlock(testlabel_target)
 asmcfg.add_block(my_block_target)
-testlabel_src1 = mdis.symbol_pool.getby_name_create("testlabel_src1")
-testlabel_src2 = mdis.symbol_pool.getby_name_create("testlabel_src2")
+testlabel_src1 = mdis.loc_db.getby_name_create("testlabel_src1")
+testlabel_src2 = mdis.loc_db.getby_name_create("testlabel_src2")
 my_block_src1 = AsmBlock(testlabel_src1)
 my_block_src2 = AsmBlock(testlabel_src2)
 my_block_src1.bto.add(AsmConstraintNext(my_block_target.loc_key))
@@ -184,8 +184,8 @@ assert asmcfg.loc_key_to_block(my_block_src1.loc_key).max_size == 0
 
 ## Check pendings
 ### Create a pending element
-testlabel_pend_src = mdis.symbol_pool.getby_name_create("testlabel_pend_src")
-testlabel_pend_dst = mdis.symbol_pool.getby_name_create("testlabel_pend_dst")
+testlabel_pend_src = mdis.loc_db.getby_name_create("testlabel_pend_src")
+testlabel_pend_dst = mdis.loc_db.getby_name_create("testlabel_pend_dst")
 my_block_src = AsmBlock(testlabel_pend_src)
 my_block_dst = AsmBlock(testlabel_pend_dst)
 my_block_src.bto.add(AsmConstraintTo(my_block_dst.loc_key))
@@ -268,16 +268,16 @@ assert asmcfg.successors(tob.loc_key) == [tob.loc_key]
 # Check split_block
 ## Without condition for a split, no change
 asmcfg_bef = asmcfg.copy()
-asmcfg.apply_splitting(mdis.symbol_pool)
+asmcfg.apply_splitting(mdis.loc_db)
 assert asmcfg_bef == asmcfg
 open("graph5.dot", "w").write(asmcfg.dot())
 ## Create conditions for a block split
-inside_firstbbl = mdis.symbol_pool.getby_offset(4)
+inside_firstbbl = mdis.loc_db.getby_offset(4)
 tob.bto.add(AsmConstraintTo(inside_firstbbl))
 asmcfg.rebuild_edges()
 assert len(asmcfg.pendings) == 1
 assert inside_firstbbl in asmcfg.pendings
-asmcfg.apply_splitting(mdis.symbol_pool)
+asmcfg.apply_splitting(mdis.loc_db)
 ## Check result
 assert len(asmcfg) == 6
 assert len(asmcfg.pendings) == 0
@@ -322,10 +322,10 @@ solutions = list(matcher.match(asmcfg))
 assert len(solutions) == 1
 solution = solutions.pop()
 for jbbl, label in solution.iteritems():
-    offset = mdis.symbol_pool.loc_key_to_offset(label)
+    offset = mdis.loc_db.loc_key_to_offset(label)
     assert offset == int(jbbl._name, 16)
 
-loc_key_dum = mdis.symbol_pool.getby_name_create("dummy_loc")
+loc_key_dum = mdis.loc_db.getby_name_create("dummy_loc")
 asmcfg.add_node(loc_key_dum)
 error_raised = False
 try:
diff --git a/test/core/parse_asm.py b/test/core/parse_asm.py
index fab3a815..e8d5adc5 100755
--- a/test/core/parse_asm.py
+++ b/test/core/parse_asm.py
@@ -64,15 +64,15 @@ class TestParseAsm(unittest.TestCase):
         .string "toto"
         '''
 
-        asmcfg, symbol_pool = parse_txt(mn_x86, 32, ASM0)
+        asmcfg, loc_db = parse_txt(mn_x86, 32, ASM0)
         patches = asm_resolve_final(mn_x86,
                                     asmcfg,
-                                    symbol_pool)
+                                    loc_db)
         lbls = []
         for i in xrange(6):
-            lbls.append(symbol_pool.getby_name('lbl%d' % i))
+            lbls.append(loc_db.getby_name('lbl%d' % i))
         # align test
-        offset = symbol_pool.loc_key_to_offset(lbls[5])
+        offset = loc_db.loc_key_to_offset(lbls[5])
         assert(offset % 0x10 == 0)
         lbl2block = {}
         for block in asmcfg.blocks:
@@ -95,10 +95,10 @@ class TestParseAsm(unittest.TestCase):
             RET
         '''
 
-        asmcfg, symbol_pool = parse_txt(mn_x86, 32, ASM0)
+        asmcfg, loc_db = parse_txt(mn_x86, 32, ASM0)
         lbls = []
         for i in xrange(2):
-            lbls.append(symbol_pool.getby_name('lbl%d' % i))
+            lbls.append(loc_db.getby_name('lbl%d' % i))
         lbl2block = {}
         for block in asmcfg.blocks:
             lbl2block[block.loc_key] = block
diff --git a/test/core/sembuilder.py b/test/core/sembuilder.py
index 53aa199d..f7a96b89 100644
--- a/test/core/sembuilder.py
+++ b/test/core/sembuilder.py
@@ -2,15 +2,15 @@ import inspect
 from pdb import pm
 
 from miasm2.core.sembuilder import SemBuilder
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 import miasm2.expression.expression as m2_expr
 
 
 
 # Test classes
 class IR(object):
-    def __init__(self, symbol_pool):
-        self.symbol_pool = symbol_pool
+    def __init__(self, loc_db):
+        self.loc_db = loc_db
 
     IRDst = m2_expr.ExprId("IRDst", 32)
 
@@ -45,8 +45,8 @@ def test(Arg1, Arg2, Arg3):
 a = m2_expr.ExprId('A', 32)
 b = m2_expr.ExprId('B', 32)
 c = m2_expr.ExprId('C', 32)
-symbol_pool = AsmSymbolPool()
-ir = IR(symbol_pool)
+loc_db = LocationDB()
+ir = IR(loc_db)
 instr = Instr()
 res = test(ir, instr, a, b, c)
 
diff --git a/test/ir/translators/z3_ir.py b/test/ir/translators/z3_ir.py
index 29b3c39d..4806ad96 100644
--- a/test/ir/translators/z3_ir.py
+++ b/test/ir/translators/z3_ir.py
@@ -1,14 +1,14 @@
 import z3
 
-from miasm2.core.asmblock import AsmSymbolPool
+from miasm2.core.locationdb import LocationDB
 from miasm2.expression.expression import *
 from miasm2.ir.translators.z3_ir import Z3Mem, TranslatorZ3
 
 # Some examples of use/unit tests.
 
-symbol_pool = AsmSymbolPool()
-translator1 = TranslatorZ3(endianness="<", symbol_pool=symbol_pool)
-translator2 = TranslatorZ3(endianness=">", symbol_pool=symbol_pool)
+loc_db = LocationDB()
+translator1 = TranslatorZ3(endianness="<", loc_db=loc_db)
+translator2 = TranslatorZ3(endianness=">", loc_db=loc_db)
 
 
 def equiv(z3_expr1, z3_expr2):
@@ -143,14 +143,14 @@ for miasm_int, res in [(five, -5), (four, -4)]:
     assert equiv(ez3, z3_e6)
 
 # --------------------------------------------------------------------------
-label_histoire = symbol_pool.add_location("label_histoire", 0xdeadbeef)
+label_histoire = loc_db.add_location("label_histoire", 0xdeadbeef)
 e7 = ExprLoc(label_histoire, 32)
 ez3 = translator1.from_expr(e7)
 z3_e7 = z3.BitVecVal(0xdeadbeef, 32)
 assert equiv(ez3, z3_e7)
 
 # Should just not throw anything to pass
-lbl_e8 = symbol_pool.add_location("label_jambe")
+lbl_e8 = loc_db.add_location("label_jambe")
 
 e8 = ExprLoc(lbl_e8, 32)
 ez3 = translator1.from_expr(e8)