diff options
Diffstat (limited to 'test')
| -rw-r--r-- | test/arch/ppc32/arch.py | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/test/arch/ppc32/arch.py b/test/arch/ppc32/arch.py index c10a046e..13c69c73 100644 --- a/test/arch/ppc32/arch.py +++ b/test/arch/ppc32/arch.py @@ -42,6 +42,7 @@ reg_tests = [ ('b', "XXXXXXXX LBZU R0, 0x1(R31)", "8c1f0001"), ('b', "XXXXXXXX LBZUX R0, R31, R3", "7c1f18ee"), ('b', "XXXXXXXX LBZX R0, R30, R31", "7c1ef8ae"), + ('b', "XXXXXXXX LFS FPR6, 0x1(R1)", "c0c10001"), ('b', "XXXXXXXX LHA R9, 0x8(R31)", "a93f0008"), ('b', "XXXXXXXX LHAU R0, 0xFFFFFFFE(R9)", "ac09fffe"), ('b', "XXXXXXXX LHAX R0, R11, R9", "7c0b4aae"), @@ -49,10 +50,16 @@ reg_tests = [ ('b', "XXXXXXXX LHZX R0, R9, R10", "7c09522e"), ('b', "XXXXXXXX LMW R14, 0x8(R1)", "b9c10008"), ('b', "XXXXXXXX LSWI R5, R4, 0xC", "7ca464aa"), + ('b', "XXXXXXXX LVEWX VR0, R1, R2", "7c01108e"), + ('b', "XXXXXXXX LVSL VR0, R1, R2", "7c01100c"), + ('b', "XXXXXXXX LVSR VR0, R1, R2", "7c01104c"), ('b', "XXXXXXXX LWZ R0, 0x24(R1)", "80010024"), ('b', "XXXXXXXX LWZU R0, 0x4(R7)", "84070004"), ('b', "XXXXXXXX LWZX R29, R25, R0", "7fb9002e"), ('b', "XXXXXXXX MCRF CR1, CR2", "4c880000"), + ('b', "XXXXXXXX MFFS FPR23", "fee0048e"), + ('b', "XXXXXXXX MTFSF 0x88, FPR6", "fd10358e"), + ('b', "XXXXXXXX MTVSCR VR0", "10000644"), ('b', "XXXXXXXX MULLI R0, R2, 0xFFFFFFE7", "1c02ffe7"), ('b', "XXXXXXXX MULLI R3, R30, 0xC", "1c7e000c"), ('b', "XXXXXXXX NAND R0, R0, R0", "7c0003b8"), @@ -72,6 +79,7 @@ reg_tests = [ ('b', "XXXXXXXX SRW R0, R23, R10", "7ee05430"), ('b', "XXXXXXXX STB R0, 0x1020(R30)", "981e1020"), ('b', "XXXXXXXX STBU R0, 0x1(R11)", "9c0b0001"), + ('b', "XXXXXXXX STFS FPR6, 0x1(R1)", "d0c10001"), ('b', "XXXXXXXX STH R6, (R3)", "b0c30000"), ('b', "XXXXXXXX STMW R14, 0x8(R1)", "bdc10008"), ('b', "XXXXXXXX STW R0, 0x24(R1)", "90010024"), |