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* Fix xdot outputFabrice Desclaux2025-01-243-27/+19
| | | | Signed-off-by: Fabrice Desclaux <fabrice.desclaux@cea.fr>
* Fix typo in aarch64_immhi_page decodeAeonLucid2024-08-031-1/+1
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* Merge pull request #1486 from serpilliere/fix_aarch64_cmpserpilliere2024-04-281-2/+7
|\ | | | | Fix add/sub aarch64
| * Fix add/sub aarch64Fabrice Desclaux2024-04-271-2/+7
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* | Merge pull request #1474 from DimitriPapadopoulos/codespellserpilliere2024-03-282-2/+2
|\ \ | | | | | | Fix typos found by codespell
| * | Fix typos found by codespellDimitri Papadopoulos2024-03-182-2/+2
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* | | Merge pull request #1457 from W0ni/arm_handle_cf_shiftersserpilliere2024-03-212-76/+211
|\ \ \ | |/ / |/| | [ARM] compute cf for shift/rotate
| * | Add tests for MOVS and isThumb utility functionwoni2023-09-131-0/+3
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| * | Fix disassembly bugwoni2023-09-131-0/+4
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| * | Add RRX support inside instructionswoni2023-09-061-0/+50
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| * | Add shifters for instructions that use shifter carrywoni2023-09-061-76/+154
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* | Use regex literals for re.* functionsDuncan Ogilvie2024-01-061-1/+1
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* | Remove trailing whitespaceDuncan Ogilvie2024-01-061-5/+5
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* [x86] add missing Expression EIP when using address-size prefix for ↵w4kfu2022-05-231-1/+1
| | | | RIP-relative addressing
* fix bug of cb_arm_fix_callling2022-02-151-1/+1
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* Fix delayslot to support pickleFabrice Desclaux2022-01-268-13/+1
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* Implements syscall handler for mips32b + minimal Linux environmenticecr4ck@protonmail.com2022-01-142-1/+18
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* Fix html; Add reg testFabrice Desclaux2021-12-062-4/+6
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* Colorize ir/asmFabrice Desclaux2021-12-018-3/+318
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* Fixed "POP reg_sp" in all modesElias Bachaalany2021-11-121-2/+2
| | | | | | | POP SP/ESP were broken in x64 mode. Same for POP SP in x32 mode. etc. Now, we don't increment reg_sp at all if it is the target of the POP.
* Add aarch64 strlrxxFabrice Desclaux2021-10-291-1/+4
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* Clean encode's value checkpengc2021-09-033-26/+0
| | | | Seems we can do it in one pleace in cpu.py. it simple than check value and mask in every encode().
* x86_64 Fix multiple REX prefix instruction disasm (#1376)Konstantin Komarov2021-07-031-3/+7
| | | | Fix multiple rex prefixes
* Symbols are str instead of bytesFabrice Desclaux2021-06-087-7/+7
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* Fix m2_expr import in sem.py in MIPS32THUzxj2021-03-231-39/+39
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* Fix sb & sh instruction in MIPS32 #1361THUzxj2021-03-231-4/+4
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* Fix ADD/SUB; Add CMNFabrice Desclaux2021-02-142-2/+41
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* Aarch64: add ldar/stlrFabrice Desclaux2021-01-091-1/+6
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* Rename ir_arch for jitterFabrice Desclaux2020-12-254-40/+40
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* Rename LifterModelCallMsp430Fabrice Desclaux2020-12-241-3/+3
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* Rename LifterModelCallPpc32bFabrice Desclaux2020-12-241-2/+2
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* Rename LifterModelCallMips32Fabrice Desclaux2020-12-241-2/+2
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* Rename LifterModelCallMepFabrice Desclaux2020-12-241-3/+3
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* Rename LifterModelCallAarch64Fabrice Desclaux2020-12-241-6/+6
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* Rename LifterModelCallArmFabrice Desclaux2020-12-241-8/+8
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* Rename LifterModelCallX86Fabrice Desclaux2020-12-241-3/+3
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* Rename arch lifterFabrice Desclaux2020-12-247-0/+0
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* Rename msp430 lifterFabrice Desclaux2020-12-243-6/+6
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* Rename mips32 lifterFabrice Desclaux2020-12-243-10/+10
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* Rename mep lifterFabrice Desclaux2020-12-243-9/+9
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* Fix mep tipo semanticFabrice Desclaux2020-12-241-1/+1
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* Rename ppc32 lifterFabrice Desclaux2020-12-243-6/+6
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* Rename aarch64 lifterFabrice Desclaux2020-12-243-10/+10
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* Rename arm lifterFabrice Desclaux2020-12-243-17/+17
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* Rename x86 lifterFabrice Desclaux2020-12-243-14/+14
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* Rename ira => LifterModelCallFabrice Desclaux2020-12-247-16/+16
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* Rename IntermediateRepresentation to LifterFabrice Desclaux2020-12-247-28/+28
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* Merge pull request #1321 from 327135569/fix_unresolveserpilliere2020-12-201-1/+1
|\ | | | | fix unresolve
| * fix unresolve3271355692020-12-061-1/+1
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* | Sembuilder: Remove mem[X]Fabrice Desclaux2020-12-162-73/+140
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