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| author | Richard Henderson <richard.henderson@linaro.org> | 2024-01-13 09:02:38 +1100 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-01-23 13:22:46 +1000 |
| commit | 1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8 (patch) | |
| tree | e4342d33e612adf1fad58911dfc0669c8fa0c356 | |
| parent | c1ddc18f37108498f45d57afd6bf33a23b703648 (diff) | |
| download | focaccia-qemu-1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8.tar.gz focaccia-qemu-1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8.zip | |
linux-user/riscv: Adjust vdso signal frame cfa offsets
A typo in sizeof_reg put the registers at the wrong offset. Simplify the expressions to use positive addresses from the start of uc_mcontext instead of negative addresses from the end of uc_mcontext. Reported-by: Vineet Gupta <vineetg@rivosinc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '')
| -rwxr-xr-x | linux-user/riscv/vdso-32.so | bin | 2900 -> 2980 bytes | |||
| -rwxr-xr-x | linux-user/riscv/vdso-64.so | bin | 3856 -> 3944 bytes | |||
| -rw-r--r-- | linux-user/riscv/vdso.S | 8 |
3 files changed, 4 insertions, 4 deletions
diff --git a/linux-user/riscv/vdso-32.so b/linux-user/riscv/vdso-32.so index 1ad1e5cbbb..c2ce2a4757 100755 --- a/linux-user/riscv/vdso-32.so +++ b/linux-user/riscv/vdso-32.so Binary files differdiff --git a/linux-user/riscv/vdso-64.so b/linux-user/riscv/vdso-64.so index 83992bebe6..ae49f5b043 100755 --- a/linux-user/riscv/vdso-64.so +++ b/linux-user/riscv/vdso-64.so Binary files differdiff --git a/linux-user/riscv/vdso.S b/linux-user/riscv/vdso.S index a86d8fc488..c37275233a 100644 --- a/linux-user/riscv/vdso.S +++ b/linux-user/riscv/vdso.S @@ -101,12 +101,12 @@ endf __vdso_flush_icache .cfi_startproc simple .cfi_signal_frame -#define sizeof_reg (__riscv_xlen / 4) +#define sizeof_reg (__riscv_xlen / 8) #define sizeof_freg 8 -#define B_GR (offsetof_uc_mcontext - sizeof_rt_sigframe) -#define B_FR (offsetof_uc_mcontext - sizeof_rt_sigframe + offsetof_freg0) +#define B_GR 0 +#define B_FR offsetof_freg0 - .cfi_def_cfa 2, sizeof_rt_sigframe + .cfi_def_cfa 2, offsetof_uc_mcontext /* Return address */ .cfi_return_column 64 |