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| author | Richard Henderson <richard.henderson@linaro.org> | 2023-02-25 12:24:07 -1000 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-03-13 07:03:39 -0700 |
| commit | 1b7bc9b5c8bf374dd37e49cc258e4ab3447b7148 (patch) | |
| tree | 69d066e1508e200d12712d5252f3772d5601de79 | |
| parent | a2c4fb8cae92a2f54d77d6cc5c0404459e9dbabc (diff) | |
| download | focaccia-qemu-1b7bc9b5c8bf374dd37e49cc258e4ab3447b7148.tar.gz focaccia-qemu-1b7bc9b5c8bf374dd37e49cc258e4ab3447b7148.zip | |
target/arm: Avoid tcg_const_ptr in handle_vec_simd_sqshrn
It is easy enough to use mov instead of or-with-zero and relying on the optimizer to fold away the or. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | target/arm/tcg/translate-a64.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 2ad7c48901..082a8b82dd 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -8459,7 +8459,7 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q, tcg_rn = tcg_temp_new_i64(); tcg_rd = tcg_temp_new_i64(); tcg_rd_narrowed = tcg_temp_new_i32(); - tcg_final = tcg_const_i64(0); + tcg_final = tcg_temp_new_i64(); if (round) { tcg_round = tcg_constant_i64(1ULL << (shift - 1)); @@ -8473,7 +8473,11 @@ static void handle_vec_simd_sqshrn(DisasContext *s, bool is_scalar, bool is_q, false, is_u_shift, size+1, shift); narrowfn(tcg_rd_narrowed, cpu_env, tcg_rd); tcg_gen_extu_i32_i64(tcg_rd, tcg_rd_narrowed); - tcg_gen_deposit_i64(tcg_final, tcg_final, tcg_rd, esize * i, esize); + if (i == 0) { + tcg_gen_mov_i64(tcg_final, tcg_rd); + } else { + tcg_gen_deposit_i64(tcg_final, tcg_final, tcg_rd, esize * i, esize); + } } if (!is_q) { |