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| author | Nico Boehr <nrb@linux.ibm.com> | 2021-12-16 14:16:57 +0100 |
|---|---|---|
| committer | Thomas Huth <thuth@redhat.com> | 2022-01-17 08:34:19 +0100 |
| commit | 2df59b73e0864f021f6179f32f7ed364f6d4f38d (patch) | |
| tree | 8cd5c9da16c3b9edb4b13902cf42e3ea1a90945a | |
| parent | 69353c332c558cead5f8081d0bb69f989fe33fa3 (diff) | |
| download | focaccia-qemu-2df59b73e0864f021f6179f32f7ed364f6d4f38d.tar.gz focaccia-qemu-2df59b73e0864f021f6179f32f7ed364f6d4f38d.zip | |
s390x/css: fix PMCW invalid mask
Previously, we required bits 5, 6 and 7 to be zero (0x07 == 0b111). But,
as per the principles of operation, bit 5 is ignored in MSCH and bits 0,
1, 6 and 7 need to be zero.
As both PMCW_FLAGS_MASK_INVALID and ioinst_schib_valid() are only used
by ioinst_handle_msch(), adjust the mask accordingly.
Fixes: db1c8f53bfb1 ("s390: Channel I/O basic definitions.")
Signed-off-by: Nico Boehr <nrb@linux.ibm.com>
Reviewed-by: Pierre Morel <pmorel@linux.ibm.com>
Reviewed-by: Halil Pasic <pasic@linux.ibm.com>
Reviewed-by: Janosch Frank <frankja@linux.ibm.com>
Reviewed-by: Cornelia Huck <cohuck@redhat.com>
Message-Id: <20211216131657.1057978-1-nrb@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to '')
| -rw-r--r-- | include/hw/s390x/ioinst.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/hw/s390x/ioinst.h b/include/hw/s390x/ioinst.h index 3771fff9d4..ea8d0f2444 100644 --- a/include/hw/s390x/ioinst.h +++ b/include/hw/s390x/ioinst.h @@ -107,7 +107,7 @@ QEMU_BUILD_BUG_MSG(sizeof(PMCW) != 28, "size of PMCW is wrong"); #define PMCW_FLAGS_MASK_MP 0x0004 #define PMCW_FLAGS_MASK_TF 0x0002 #define PMCW_FLAGS_MASK_DNV 0x0001 -#define PMCW_FLAGS_MASK_INVALID 0x0700 +#define PMCW_FLAGS_MASK_INVALID 0xc300 #define PMCW_CHARS_MASK_ST 0x00e00000 #define PMCW_CHARS_MASK_MBFC 0x00000004 |