diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2025-02-17 08:21:36 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2025-02-18 08:28:54 -0800 |
| commit | a0ea8654e525a2bd5c4c197948d3ba179ded90c7 (patch) | |
| tree | 67fa7ee559fcb4dd942433c24de053ea8c5353b2 | |
| parent | 252394c95baddf3d61f95cdd0c4697298de425d4 (diff) | |
| download | focaccia-qemu-a0ea8654e525a2bd5c4c197948d3ba179ded90c7.tar.gz focaccia-qemu-a0ea8654e525a2bd5c4c197948d3ba179ded90c7.zip | |
target/loongarch: Use VADDR_PRIx for logging pc_next
DisasContextBase.pc_next has type vaddr; use the correct log format.
Fixes: 85c19af63e7 ("include/exec: Use vaddr in DisasContextBase for virtual addresses")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | target/loongarch/tcg/insn_trans/trans_atomic.c.inc | 2 | ||||
| -rw-r--r-- | target/loongarch/tcg/translate.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc index 974bc2a70f..3d70d75941 100644 --- a/target/loongarch/tcg/insn_trans/trans_atomic.c.inc +++ b/target/loongarch/tcg/insn_trans/trans_atomic.c.inc @@ -56,7 +56,7 @@ static bool gen_am(DisasContext *ctx, arg_rrr *a, if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) { qemu_log_mask(LOG_GUEST_ERROR, "Warning: source register overlaps destination register" - "in atomic insn at pc=0x" TARGET_FMT_lx "\n", + "in atomic insn at pc=0x%" VADDR_PRIx "\n", ctx->base.pc_next - 4); return false; } diff --git a/target/loongarch/tcg/translate.c b/target/loongarch/tcg/translate.c index 3480f54c71..e59e4ed25b 100644 --- a/target/loongarch/tcg/translate.c +++ b/target/loongarch/tcg/translate.c @@ -289,7 +289,7 @@ static void loongarch_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) if (!decode(ctx, ctx->opcode)) { qemu_log_mask(LOG_UNIMP, "Error: unknown opcode. " - TARGET_FMT_lx ": 0x%x\n", + "0x%" VADDR_PRIx ": 0x%x\n", ctx->base.pc_next, ctx->opcode); generate_exception(ctx, EXCCODE_INE); } |