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| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-07-31 16:38:25 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2015-08-01 09:39:50 +0200 |
| commit | c99d69694af4ed15b33e3f7c2e3ef6972c14358d (patch) | |
| tree | 085e49e9c5c949390e61753fdf7597fc5788e6bd | |
| parent | 3c8691f568f49bf623dcb2850464d4156d95e61b (diff) | |
| download | focaccia-qemu-c99d69694af4ed15b33e3f7c2e3ef6972c14358d.tar.gz focaccia-qemu-c99d69694af4ed15b33e3f7c2e3ef6972c14358d.zip | |
tcg/mips: fix add2
The add2 code in the tcg_out_addsub2 function doesn't take into account the case where rl == al == bl. In that case we can't compute the carry after the addition. As it corresponds to a multiplication by 2, the carry bit is the bit 31. While this is a corner case, this prevents x86-64 guests to boot on a MIPS host. Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to '')
| -rw-r--r-- | tcg/mips/tcg-target.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index 064db464b1..e97980df0b 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1271,6 +1271,9 @@ static void tcg_out_addsub2(TCGContext *s, TCGReg rl, TCGReg rh, TCGReg al, if (cbl) { tcg_out_opc_imm(s, OPC_ADDIU, rl, al, bl); tcg_out_opc_imm(s, OPC_SLTIU, TCG_TMP0, rl, bl); + } else if (rl == al && rl == bl) { + tcg_out_opc_sa(s, OPC_SRL, TCG_TMP0, al, 31); + tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); } else { tcg_out_opc_reg(s, OPC_ADDU, rl, al, bl); tcg_out_opc_reg(s, OPC_SLTU, TCG_TMP0, rl, (rl == bl ? al : bl)); |