diff options
| author | BALATON Zoltan <balaton@eik.bme.hu> | 2025-02-10 17:03:29 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@linaro.org> | 2025-03-11 20:00:16 +0100 |
| commit | d060b2789f71e8cd1d07c4374e0c96c299423952 (patch) | |
| tree | a98e43783a66793a367b0bfbde7519fc35f3c939 | |
| parent | 825b96dbcee23d134b691fc75618b59c5f53da32 (diff) | |
| download | focaccia-qemu-d060b2789f71e8cd1d07c4374e0c96c299423952.tar.gz focaccia-qemu-d060b2789f71e8cd1d07c4374e0c96c299423952.zip | |
hw/sd/sdhci: Set reset value of interrupt registers
The interrupt enable registers are not reset to 0 on Freescale eSDHC but some bits are enabled on reset. At least some U-Boot versions seem to expect this and not initialise these registers before expecting interrupts. Use existing vendor property for Freescale eSDHC and set the reset value of the interrupt registers to match Freescale documentation. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-ID: <20250210160329.DDA7F4E600E@zero.eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Diffstat (limited to '')
| -rw-r--r-- | hw/ppc/e500.c | 1 | ||||
| -rw-r--r-- | hw/sd/sdhci.c | 4 | ||||
| -rw-r--r-- | include/hw/sd/sdhci.h | 1 |
3 files changed, 6 insertions, 0 deletions
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index fe8b9f7962..69269aa24c 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1043,6 +1043,7 @@ void ppce500_init(MachineState *machine) dev = qdev_new(TYPE_SYSBUS_SDHCI); qdev_prop_set_uint8(dev, "sd-spec-version", 2); qdev_prop_set_uint8(dev, "endianness", DEVICE_BIG_ENDIAN); + qdev_prop_set_uint8(dev, "vendor", SDHCI_VENDOR_FSL); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC85XX_ESDHC_IRQ)); diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 1f45a77566..fe87e18d5d 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -307,6 +307,10 @@ static void sdhci_reset(SDHCIState *s) s->data_count = 0; s->stopped_state = sdhc_not_stopped; s->pending_insert_state = false; + if (s->vendor == SDHCI_VENDOR_FSL) { + s->norintstsen = 0x013f; + s->errintstsen = 0x117f; + } } static void sdhci_poweron_reset(DeviceState *dev) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 38c08e2859..f722d8eb1c 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -110,6 +110,7 @@ typedef struct SDHCIState SDHCIState; #define SDHCI_VENDOR_NONE 0 #define SDHCI_VENDOR_IMX 1 +#define SDHCI_VENDOR_FSL 2 /* * Controller does not provide transfer-complete interrupt when not |