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| author | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-02-07 12:44:46 +0100 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <f4bug@amsat.org> | 2022-03-06 13:15:42 +0100 |
| commit | 3cb1a410efb5d246862d7f1c135963fd0a688d70 (patch) | |
| tree | ff5b0bf5d5ad43ff6f42c91fb648f0d3c27d5a9b | |
| parent | a38d55705bcd724158dab2db9dabad8b7ddf9a77 (diff) | |
| download | focaccia-qemu-3cb1a410efb5d246862d7f1c135963fd0a688d70.tar.gz focaccia-qemu-3cb1a410efb5d246862d7f1c135963fd0a688d70.zip | |
target: Include missing 'cpu.h'
These target-specific files use the target-specific CPU state
but lack to include "cpu.h"; i.e.:
../target/riscv/pmp.h:61:23: error: unknown type name 'CPURISCVState'
void pmpcfg_csr_write(CPURISCVState *env, uint32_t reg_index,
^
../target/nios2/mmu.h:43:18: error: unknown type name 'CPUNios2State'
void mmu_flip_um(CPUNios2State *env, unsigned int um);
^
../target/microblaze/mmu.h:88:19: error: unknown type name 'CPUMBState'; did you mean 'CPUState'?
uint32_t mmu_read(CPUMBState *env, bool ea, uint32_t rn);
^~~~~~~~~~
CPUState
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220214183144.27402-10-f4bug@amsat.org>
Diffstat (limited to '')
| -rw-r--r-- | target/microblaze/mmu.h | 2 | ||||
| -rw-r--r-- | target/mips/internal.h | 1 | ||||
| -rw-r--r-- | target/nios2/mmu.h | 2 | ||||
| -rw-r--r-- | target/riscv/pmp.h | 2 |
4 files changed, 7 insertions, 0 deletions
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h index b6b4b9ad60..1068bd2d52 100644 --- a/target/microblaze/mmu.h +++ b/target/microblaze/mmu.h @@ -20,6 +20,8 @@ #ifndef TARGET_MICROBLAZE_MMU_H #define TARGET_MICROBLAZE_MMU_H +#include "cpu.h" + #define MMU_R_PID 0 #define MMU_R_ZPR 1 #define MMU_R_TLBX 2 diff --git a/target/mips/internal.h b/target/mips/internal.h index daddb05fd4..f705d6bfa6 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -12,6 +12,7 @@ #ifdef CONFIG_TCG #include "tcg/tcg-internal.h" #endif +#include "cpu.h" /* * MMU types, the first four entries have the same layout as the diff --git a/target/nios2/mmu.h b/target/nios2/mmu.h index b7785b46c0..5b085900fb 100644 --- a/target/nios2/mmu.h +++ b/target/nios2/mmu.h @@ -21,6 +21,8 @@ #ifndef NIOS2_MMU_H #define NIOS2_MMU_H +#include "cpu.h" + typedef struct Nios2TLBEntry { target_ulong tag; target_ulong data; diff --git a/target/riscv/pmp.h b/target/riscv/pmp.h index a9a0b363a7..fcb6b7c467 100644 --- a/target/riscv/pmp.h +++ b/target/riscv/pmp.h @@ -22,6 +22,8 @@ #ifndef RISCV_PMP_H #define RISCV_PMP_H +#include "cpu.h" + typedef enum { PMP_READ = 1 << 0, PMP_WRITE = 1 << 1, |