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authorChristoph Muellner <cmuellner@linux.com>2023-02-24 10:25:36 -0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-03-05 11:49:43 -0800
commit59cb29d6a5149871d1acb18fb465879b1af5f3b2 (patch)
tree48ac46a78ee73554285fe4a4676e04a3b309e19d
parente05da09b7cfd8dd08c55e77ab2106634f7b06ad9 (diff)
downloadfocaccia-qemu-59cb29d6a5149871d1acb18fb465879b1af5f3b2.tar.gz
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target/riscv: add Zicbop cbo.prefetch{i, r, m} placeholder
The cmo.prefetch instructions are nops for QEMU (no emulation of the
memory hierarchy, no illegal instructions, no permission faults, no
traps).

Add a comment noting where they would be decoded in case cbo.prefetch
instructions become relevant in the future.

Co-developed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Message-ID: <20230224132536.552293-5-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to '')
-rw-r--r--target/riscv/insn32.decode1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index 282e41aa3e..73d5d1b045 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -134,6 +134,7 @@ addi     ............     ..... 000 ..... 0010011 @i
 slti     ............     ..... 010 ..... 0010011 @i
 sltiu    ............     ..... 011 ..... 0010011 @i
 xori     ............     ..... 100 ..... 0010011 @i
+# cbo.prefetch_{i,r,m} instructions are ori with rd=x0 and not decoded.
 ori      ............     ..... 110 ..... 0010011 @i
 andi     ............     ..... 111 ..... 0010011 @i
 slli     00000. ......    ..... 001 ..... 0010011 @sh