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authorBALATON Zoltan <balaton@eik.bme.hu>2020-02-16 22:23:54 +0100
committerDavid Gibson <david@gibson.dropbear.id.au>2020-02-21 09:15:04 +1100
commitb561615db2fcdb2c3710cf0a0b2757b56bda922e (patch)
treee3a215ef60934641c773b36eb0927f3cadff8784
parent92eeb004e8832d0020be056eff722702eafde4dc (diff)
downloadfocaccia-qemu-b561615db2fcdb2c3710cf0a0b2757b56bda922e.tar.gz
focaccia-qemu-b561615db2fcdb2c3710cf0a0b2757b56bda922e.zip
target/ppc/cpu.h: Move fpu related members closer in cpu env
Move fp_status and fpscr closer to other floating point and vector
related members in cpu env definition so they are in one group.

Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <5b50e9e7eec2c383ae878b397d0b2927efc9ea43.1581888834.git.balaton@eik.bme.hu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to '')
-rw-r--r--target/ppc/cpu.h9
1 files changed, 4 insertions, 5 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 07dd2b4da7..c3b0a00064 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -997,11 +997,6 @@ struct CPUPPCState {
     /* temporary general purpose registers */
     target_ulong tgpr[4]; /* Used to speed-up TLB assist handlers */
 
-    /* Floating point execution context */
-    float_status fp_status;
-    /* floating point status and control register */
-    target_ulong fpscr;
-
     /* Next instruction pointer */
     target_ulong nip;
 
@@ -1060,6 +1055,10 @@ struct CPUPPCState {
      * used simultaneously
      */
     float_status vec_status;
+    /* Floating point execution context */
+    float_status fp_status;
+    /* floating point status and control register */
+    target_ulong fpscr;
 
     /* Internal devices resources */
     /* Time base and decrementer */