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authorRichard Henderson <richard.henderson@linaro.org>2021-02-18 16:47:35 +0000
committerRichard Henderson <richard.henderson@linaro.org>2023-06-26 17:33:00 +0200
commitc914d46d0a645e7c633292146f4e38c945d4f847 (patch)
tree81f560a256571448f875e369fe48b476eb7fec1a
parentf6ff4923b92ceefbe5650c3e90ccdcc57dc60fb7 (diff)
downloadfocaccia-qemu-c914d46d0a645e7c633292146f4e38c945d4f847.tar.gz
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tcg: Do not elide memory barriers for !CF_PARALLEL in system mode
The virtio devices require proper memory ordering between
the vcpus and the iothreads.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to '')
-rw-r--r--tcg/tcg-op.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c07de5d9f8..7aadb37756 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -102,7 +102,19 @@ void tcg_gen_br(TCGLabel *l)
 
 void tcg_gen_mb(TCGBar mb_type)
 {
-    if (tcg_ctx->gen_tb->cflags & CF_PARALLEL) {
+#ifdef CONFIG_USER_ONLY
+    bool parallel = tcg_ctx->gen_tb->cflags & CF_PARALLEL;
+#else
+    /*
+     * It is tempting to elide the barrier in a uniprocessor context.
+     * However, even with a single cpu we have i/o threads running in
+     * parallel, and lack of memory order can result in e.g. virtio
+     * queue entries being read incorrectly.
+     */
+    bool parallel = true;
+#endif
+
+    if (parallel) {
         tcg_gen_op1(INDEX_op_mb, mb_type);
     }
 }