diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2025-01-30 18:23:06 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2025-02-20 14:20:28 +0000 |
| commit | f706b67da61aecc54bbdad16bea3fc69e9fd844b (patch) | |
| tree | 4effd950a0dbd0b2731811f87669435110c5368d | |
| parent | 2d60f1acdb950e85335b018bcaf4ba0f042a350c (diff) | |
| download | focaccia-qemu-f706b67da61aecc54bbdad16bea3fc69e9fd844b.tar.gz focaccia-qemu-f706b67da61aecc54bbdad16bea3fc69e9fd844b.zip | |
target/arm: Use TRAP_UNCATEGORIZED for XScale CPAR traps
On XScale CPUs, there is no EL2 or AArch64, so no syndrome register. These traps are just UNDEFs in the traditional AArch32 sense, so CP_ACCESS_TRAP_UNCATEGORIZED is more accurate than CP_ACCESS_TRAP. This has no visible behavioural change, because the guest doesn't have a way to see the syndrome value we generate. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250130182309.717346-12-peter.maydell@linaro.org
Diffstat (limited to '')
| -rw-r--r-- | target/arm/tcg/op_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c index c427118655..c69d2ac643 100644 --- a/target/arm/tcg/op_helper.c +++ b/target/arm/tcg/op_helper.c @@ -764,7 +764,7 @@ const void *HELPER(access_check_cp_reg)(CPUARMState *env, uint32_t key, if (arm_feature(env, ARM_FEATURE_XSCALE) && ri->cp < 14 && extract32(env->cp15.c15_cpar, ri->cp, 1) == 0) { - res = CP_ACCESS_TRAP; + res = CP_ACCESS_TRAP_UNCATEGORIZED; goto fail; } |