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| author | Chen Qun <kuhn.chenqun@huawei.com> | 2020-08-27 19:03:05 +0800 |
|---|---|---|
| committer | Laurent Vivier <laurent@vivier.eu> | 2020-09-01 11:57:39 +0200 |
| commit | fa71dd531c12ad9a05cdd78392e9fc2a30ea921d (patch) | |
| tree | aea83ecdfd05f6ae16537ce2241ac39b5358a945 | |
| parent | 07174c86b41e91d98ed2ee0ee12e516694853c6b (diff) | |
| download | focaccia-qemu-fa71dd531c12ad9a05cdd78392e9fc2a30ea921d.tar.gz focaccia-qemu-fa71dd531c12ad9a05cdd78392e9fc2a30ea921d.zip | |
target/arm/translate-a64:Remove redundant statement in disas_simd_two_reg_misc_fp16()
Clang static code analyzer show warning:
target/arm/translate-a64.c:13007:5: warning: Value stored to 'rd' is never read
rd = extract32(insn, 0, 5);
^ ~~~~~~~~~~~~~~~~~~~~~
target/arm/translate-a64.c:13008:5: warning: Value stored to 'rn' is never read
rn = extract32(insn, 5, 5);
^ ~~~~~~~~~~~~~~~~~~~~~
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Chen Qun <kuhn.chenqun@huawei.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20200827110311.164316-5-kuhn.chenqun@huawei.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Diffstat (limited to '')
| -rw-r--r-- | target/arm/translate-a64.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 1fc3b22732..7188808341 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -13014,9 +13014,6 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) fpop = deposit32(opcode, 5, 1, a); fpop = deposit32(fpop, 6, 1, u); - rd = extract32(insn, 0, 5); - rn = extract32(insn, 5, 5); - switch (fpop) { case 0x1d: /* SCVTF */ case 0x5d: /* UCVTF */ |