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| author | Peter Maydell <peter.maydell@linaro.org> | 2021-04-13 14:32:44 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2021-04-13 14:32:44 +0100 |
| commit | 2935f6f2c15386eeb0e3da2391c9ad0bb678ec1e (patch) | |
| tree | 8af42245507fc2a96ea41e4c1e789389b69d4de1 | |
| parent | dce628a97fde2594f99d738883a157f05aa0a14f (diff) | |
| parent | f4349ba966abfe39f5d98694abd7c7551d5c8c02 (diff) | |
| download | focaccia-qemu-2935f6f2c15386eeb0e3da2391c9ad0bb678ec1e.tar.gz focaccia-qemu-2935f6f2c15386eeb0e3da2391c9ad0bb678ec1e.zip | |
Merge remote-tracking branch 'remotes/philmd/tags/mips-20210413' into staging
MIPS patches queue - Fix invalid Kconfig dependency - Fix missing migrated value - Fix TCG temporary leak # gpg: Signature made Tue 13 Apr 2021 11:10:11 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd/tags/mips-20210413: target/mips: Fix TCG temporary leak in gen_cache_operation() hw/isa/piix4: Migrate Reset Control Register hw/isa/Kconfig: Add missing dependency VIA VT82C686 -> APM Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | hw/isa/Kconfig | 1 | ||||
| -rw-r--r-- | hw/isa/piix4.c | 15 | ||||
| -rw-r--r-- | target/mips/translate.c | 2 |
3 files changed, 17 insertions, 1 deletions
diff --git a/hw/isa/Kconfig b/hw/isa/Kconfig index 2691eae2f0..55e0003ce4 100644 --- a/hw/isa/Kconfig +++ b/hw/isa/Kconfig @@ -48,6 +48,7 @@ config VT82C686 select SERIAL_ISA select FDC select USB_UHCI + select APM config SMC37C669 bool diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index a50d97834c..b3b6a4378a 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -93,12 +93,25 @@ static void piix4_isa_reset(DeviceState *dev) pci_conf[0xae] = 0x00; } +static int piix4_ide_post_load(void *opaque, int version_id) +{ + PIIX4State *s = opaque; + + if (version_id == 2) { + s->rcr = 0; + } + + return 0; +} + static const VMStateDescription vmstate_piix4 = { .name = "PIIX4", - .version_id = 2, + .version_id = 3, .minimum_version_id = 2, + .post_load = piix4_ide_post_load, .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(dev, PIIX4State), + VMSTATE_UINT8_V(rcr, PIIX4State, 3), VMSTATE_END_OF_LIST() } }; diff --git a/target/mips/translate.c b/target/mips/translate.c index c518bf3963..71fa5ec197 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -12804,6 +12804,8 @@ static void gen_cache_operation(DisasContext *ctx, uint32_t op, int base, TCGv t1 = tcg_temp_new(); gen_base_offset_addr(ctx, t1, base, offset); gen_helper_cache(cpu_env, t1, t0); + tcg_temp_free(t1); + tcg_temp_free_i32(t0); } #if defined(TARGET_MIPS64) |