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| author | Fabiano Rosas <farosas@linux.ibm.com> | 2022-01-04 07:55:34 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2022-01-04 07:55:34 +0100 |
| commit | 5ac11b126d47755c39727cc772ee16cb49b3ade7 (patch) | |
| tree | 7733c751f1a6611c717d3e64500254606a986f2e | |
| parent | d1cbee61abd5ca76cd04886d066e18fcda8d1116 (diff) | |
| download | focaccia-qemu-5ac11b126d47755c39727cc772ee16cb49b3ade7.tar.gz focaccia-qemu-5ac11b126d47755c39727cc772ee16cb49b3ade7.zip | |
target/ppc: powerpc_excp: Move system call vectored code together
Now that 'vector' is known before calling the interrupt-specific setup code, we can move all of the scv setup into one place. No functional change intended. Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211229165751.3774248-5-farosas@linux.ibm.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| -rw-r--r-- | target/ppc/excp_helper.c | 13 |
1 files changed, 5 insertions, 8 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c index 35ac450590..2c20a8060c 100644 --- a/target/ppc/excp_helper.c +++ b/target/ppc/excp_helper.c @@ -623,6 +623,11 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->nip += 4; new_msr |= env->msr & ((target_ulong)1 << MSR_EE); new_msr |= env->msr & ((target_ulong)1 << MSR_RI); + + vector += lev * 0x20; + + env->lr = env->nip; + env->ctr = msr; break; case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ @@ -936,14 +941,6 @@ static void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) /* Save MSR */ env->spr[srr1] = msr; - -#if defined(TARGET_PPC64) - } else { - vector += lev * 0x20; - - env->lr = env->nip; - env->ctr = msr; -#endif } /* This can update new_msr and vector if AIL applies */ |