diff options
| author | David Woodhouse <dwmw@amazon.co.uk> | 2023-10-23 09:37:52 +0100 |
|---|---|---|
| committer | David Woodhouse <dwmw@amazon.co.uk> | 2024-02-02 16:23:47 +0000 |
| commit | 5fcc51548dc7b6c0c42e777c3586804eb48d8586 (patch) | |
| tree | 997b30e2053a4d447d82f59033bb357f84231dd2 | |
| parent | 2a98878ff40131ae5d12d92e8bce05caef6a4c8d (diff) | |
| download | focaccia-qemu-5fcc51548dc7b6c0c42e777c3586804eb48d8586.tar.gz focaccia-qemu-5fcc51548dc7b6c0c42e777c3586804eb48d8586.zip | |
hw/openrisc/openrisc_sim: use qemu_create_nic_device()
Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Reviewed-by: Thomas Huth <thuth@redhat.com>
| -rw-r--r-- | hw/openrisc/openrisc_sim.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index 35da123aef..bffd6f721f 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -170,7 +170,7 @@ static void openrisc_create_fdt(Or1ksimState *state, static void openrisc_sim_net_init(Or1ksimState *state, hwaddr base, hwaddr size, int num_cpus, OpenRISCCPU *cpus[], - int irq_pin, NICInfo *nd) + int irq_pin) { void *fdt = state->fdt; DeviceState *dev; @@ -178,8 +178,10 @@ static void openrisc_sim_net_init(Or1ksimState *state, hwaddr base, hwaddr size, char *nodename; int i; - dev = qdev_new("open_eth"); - qdev_set_nic_properties(dev, nd); + dev = qemu_create_nic_device("open_eth", true, NULL); + if (!dev) { + return; + } s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); @@ -313,12 +315,10 @@ static void openrisc_sim_init(MachineState *machine) openrisc_create_fdt(state, or1ksim_memmap, smp_cpus, machine->ram_size, machine->kernel_cmdline); - if (nd_table[0].used) { - openrisc_sim_net_init(state, or1ksim_memmap[OR1KSIM_ETHOC].base, - or1ksim_memmap[OR1KSIM_ETHOC].size, - smp_cpus, cpus, - OR1KSIM_ETHOC_IRQ, nd_table); - } + openrisc_sim_net_init(state, or1ksim_memmap[OR1KSIM_ETHOC].base, + or1ksim_memmap[OR1KSIM_ETHOC].size, + smp_cpus, cpus, + OR1KSIM_ETHOC_IRQ); if (smp_cpus > 1) { openrisc_sim_ompic_init(state, or1ksim_memmap[OR1KSIM_OMPIC].base, |