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authorPaolo Bonzini <pbonzini@redhat.com>2017-04-05 10:11:36 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2017-04-05 17:23:52 +0200
commit8c9f42f3cf3598e8bb612b3f81cd12632efd3ca4 (patch)
tree1f7dc7f52d8ab79d2e2d38706e56bb23f7541f31
parent87cc4c61020addea6a001b94b662596b1896d1b3 (diff)
downloadfocaccia-qemu-8c9f42f3cf3598e8bb612b3f81cd12632efd3ca4.tar.gz
focaccia-qemu-8c9f42f3cf3598e8bb612b3f81cd12632efd3ca4.zip
tco: do not generate an NMI
This behavior is not indicated in the datasheet and can confuse the OS.
The TCO can trap NMIs from SERR# or IOCHK# and convert them to SMIs; but
any other TCO event is either delivered as an SMI or completely disabled.

Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--hw/acpi/tco.c2
-rw-r--r--hw/isa/lpc_ich9.c5
-rw-r--r--include/hw/i386/ich9.h1
3 files changed, 0 insertions, 8 deletions
diff --git a/hw/acpi/tco.c b/hw/acpi/tco.c
index b4adac88cd..05b9d7ba36 100644
--- a/hw/acpi/tco.c
+++ b/hw/acpi/tco.c
@@ -75,8 +75,6 @@ static void tco_timer_expired(void *opaque)
 
     if (pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN) {
         ich9_generate_smi();
-    } else {
-        ich9_generate_nmi();
     }
     tr->tco.rld = tr->tco.tmr;
     tco_timer_reload(tr);
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 59930dd9d0..a0866c3856 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -312,11 +312,6 @@ void ich9_generate_smi(void)
     cpu_interrupt(first_cpu, CPU_INTERRUPT_SMI);
 }
 
-void ich9_generate_nmi(void)
-{
-    cpu_interrupt(first_cpu, CPU_INTERRUPT_NMI);
-}
-
 static int ich9_lpc_sci_irq(ICH9LPCState *lpc)
 {
     switch (lpc->d.config[ICH9_LPC_ACPI_CTRL] &
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index 18dcca7ebc..673d13d28f 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -21,7 +21,6 @@ void ich9_lpc_pm_init(PCIDevice *pci_lpc, bool smm_enabled);
 I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
 
 void ich9_generate_smi(void);
-void ich9_generate_nmi(void);
 
 #define ICH9_CC_SIZE (16 * 1024) /* 16KB. Chipset configuration registers */