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| author | Richard Henderson <rth@twiddle.net> | 2013-07-04 11:20:26 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-07-09 07:14:51 -0700 |
| commit | fb82273851a855e72248fcabe93bc43ab3a8efe4 (patch) | |
| tree | 6b6fa07e194d2e34c1dc0620757b1ee25a67744e | |
| parent | 72e1ccfc0cf32005e23d308edfe2d06c7472154e (diff) | |
| download | focaccia-qemu-fb82273851a855e72248fcabe93bc43ab3a8efe4.tar.gz focaccia-qemu-fb82273851a855e72248fcabe93bc43ab3a8efe4.zip | |
tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions
As it really controls the availability of a thumb interworking instruction on armv5t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | tcg/arm/tcg-target.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index 648137fb52..cfb9afbe6a 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -43,13 +43,13 @@ defined(__ARM_ARCH_5T__) || \ defined(__ARM_ARCH_5TE__) || \ defined(__ARM_ARCH_5TEJ__) -#define USE_ARMV5_INSTRUCTIONS +#define USE_ARMV5T_INSTRUCTIONS #endif -#ifdef USE_ARMV5_INSTRUCTIONS -static const int use_armv5_instructions = 1; +#ifdef USE_ARMV5T_INSTRUCTIONS +static const int use_armv5t_instructions = 1; #else -static const int use_armv5_instructions = 0; +static const int use_armv5t_instructions = 0; #endif #undef USE_ARMV5_INSTRUCTIONS @@ -1030,7 +1030,7 @@ static inline void tcg_out_call(TCGContext *s, uint32_t addr) if (val - 8 < 0x02000000 && val - 8 >= -0x02000000) { if (addr & 1) { /* Use BLX if the target is in Thumb mode */ - if (!use_armv5_instructions) { + if (!use_armv5t_instructions) { tcg_abort(); } tcg_out_blx_imm(s, val); @@ -1049,7 +1049,7 @@ static inline void tcg_out_call(TCGContext *s, uint32_t addr) static inline void tcg_out_callr(TCGContext *s, int cond, int arg) { - if (use_armv5_instructions) { + if (use_armv5t_instructions) { tcg_out_blx(s, cond, arg); } else { tcg_out_dat_reg(s, cond, ARITH_MOV, TCG_REG_R14, 0, |