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| author | Joel Stanley <joel@jms.id.au> | 2025-04-01 01:04:44 +0200 |
|---|---|---|
| committer | Cédric Le Goater <clg@redhat.com> | 2025-04-01 11:29:25 +0200 |
| commit | 20ab88a9066bcacc28acbd7cbe2c617d90bfb27e (patch) | |
| tree | c9e33dae1cb2c45ab178b4e18df98f83bfa80c2f | |
| parent | f0095c8ad93de7652aba36c4c713d9035417bea8 (diff) | |
| download | focaccia-qemu-20ab88a9066bcacc28acbd7cbe2c617d90bfb27e.tar.gz focaccia-qemu-20ab88a9066bcacc28acbd7cbe2c617d90bfb27e.zip | |
hw/misc/aspeed_scu: Correct minimum access size for AST2500 / AST2600
Guest code was performing a byte load to the SCU MMIO region, leading to the guest code crashing (it should be using proper accessors, but that is not Qemu's bug). Hardware and the documentation[1] both agree that byte loads are okay, so change all of the aspeed SCU devices to accept a minimum access size of 1. [1] See the 'ARM Address Space Mapping' table in the ASPEED docs. This is section 6.1 in the ast2400 and ast2700, and 7.1 in the ast2500 and ast2600 datasheets. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2636 Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Troy Lee <leetroy@gmail.com> Message-ID: <20241118021820.4928-1-joel@jms.id.au> [PMD: Rebased, only including SCU changes] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au> Link: https://lore.kernel.org/qemu-devel/20250331230444.88295-3-philmd@linaro.org Signed-off-by: Cédric Le Goater <clg@redhat.com>
| -rw-r--r-- | hw/misc/aspeed_scu.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c index 6703f3f969..1af1a35a08 100644 --- a/hw/misc/aspeed_scu.c +++ b/hw/misc/aspeed_scu.c @@ -443,7 +443,7 @@ static const MemoryRegionOps aspeed_ast2500_scu_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .impl.min_access_size = 4, .impl.max_access_size = 4, - .valid.min_access_size = 4, + .valid.min_access_size = 1, .valid.max_access_size = 4, .valid.unaligned = false, }; @@ -787,7 +787,7 @@ static const MemoryRegionOps aspeed_ast2600_scu_ops = { .endianness = DEVICE_LITTLE_ENDIAN, .impl.min_access_size = 4, .impl.max_access_size = 4, - .valid.min_access_size = 4, + .valid.min_access_size = 1, .valid.max_access_size = 4, .valid.unaligned = false, }; |