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authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-09-11 10:38:31 +0200
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2009-09-11 10:38:31 +0200
commit02b33596d09bafed5d58366403a2d369f0d1047e (patch)
tree1f71130701e7764fe3f2e58bcfbb05f7adcfc91c
parenta12f65078105d5f280b39ddb72a6ebdfa3b2164c (diff)
downloadfocaccia-qemu-02b33596d09bafed5d58366403a2d369f0d1047e.tar.gz
focaccia-qemu-02b33596d09bafed5d58366403a2d369f0d1047e.zip
microblaze: Trap if QEMU finds an unknown insns.
If PVR settings enable illegal insn trap, trap when QEMU finds an
insn it knows nothing about.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-rw-r--r--target-microblaze/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 37d250f9f0..fe53b2e141 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1144,6 +1144,12 @@ static void dec_fpu(DisasContext *dc)
 
 static void dec_null(DisasContext *dc)
 {
+    if ((dc->tb_flags & MSR_EE_FLAG)
+          && (dc->env->pvr.regs[2] & PVR2_ILL_OPCODE_EXC_MASK)) {
+        tcg_gen_movi_tl(cpu_SR[SR_ESR], ESR_EC_ILLEGAL_OP);
+        t_gen_raise_exception(dc, EXCP_HW_EXCP);
+        return;
+    }
     qemu_log ("unknown insn pc=%x opc=%x\n", dc->pc, dc->opcode);
     dc->abort_at_next_insn = 1;
 }