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authorYongbok Kim <yongbok.kim@mips.com>2018-06-20 13:05:47 +0100
committerAleksandar Markovic <amarkovic@wavecomp.com>2018-06-27 20:12:57 +0200
commit0305d194be1dbda09fa7a7c883894030d07c355f (patch)
tree004b6e306615b0f2a2a9a8ee15a738c1ec51ea9a
parentf48a2cb21824217a61ec7be797860a0702e5325c (diff)
downloadfocaccia-qemu-0305d194be1dbda09fa7a7c883894030d07c355f.tar.gz
focaccia-qemu-0305d194be1dbda09fa7a7c883894030d07c355f.zip
target/mips: Fix microMIPS on reset
Fix to activate microMIPS on reset when Config3.ISA == {1, 3}

Signed-off-by: Yongbok Kim <yongbok.kim@mips.com>
Reviewed-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
Signed-off-by: Aleksandar Markovic <aleksandar.markovic@mips.com>
-rw-r--r--target/mips/translate.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c
index e57d71e485..2eb211ae8c 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -20713,6 +20713,11 @@ void cpu_state_reset(CPUMIPSState *env)
         env->CP0_Status |= (1 << CP0St_FR);
     }
 
+    if (env->CP0_Config3 & (1 << CP0C3_ISA)) {
+        /*  microMIPS on reset when Config3.ISA == {1, 3} */
+        env->hflags |= MIPS_HFLAG_M16;
+    }
+
     /* MSA */
     if (env->CP0_Config3 & (1 << CP0C3_MSAP)) {
         msa_reset(env);