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authorRichard Henderson <richard.henderson@linaro.org>2022-12-12 14:48:46 -0600
committerRichard Henderson <richard.henderson@linaro.org>2022-12-18 09:39:17 -0800
commit3b1371159cdb6f31d87fbb339853cc6a963ea6a1 (patch)
tree29fc9974cf84cdf25daec42fa4edc71ee11f3e06
parentbc2331635ce18ff068d2bb1e493bc546e1f786e1 (diff)
downloadfocaccia-qemu-3b1371159cdb6f31d87fbb339853cc6a963ea6a1.tar.gz
focaccia-qemu-3b1371159cdb6f31d87fbb339853cc6a963ea6a1.zip
target/tricore: Fix gdbstub write to address registers
Typo had double-writes to data registers.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1363
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/tricore/gdbstub.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/tricore/gdbstub.c b/target/tricore/gdbstub.c
index ebf32defde..3a27a7e65d 100644
--- a/target/tricore/gdbstub.c
+++ b/target/tricore/gdbstub.c
@@ -130,7 +130,7 @@ int tricore_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
     if (n < 16) { /* data registers */
         env->gpr_d[n] = tmp;
     } else if (n < 32) { /* address registers */
-        env->gpr_d[n - 16] = tmp;
+        env->gpr_a[n - 16] = tmp;
     } else {
         tricore_cpu_gdb_write_csfr(env, n, tmp);
     }