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| author | Philippe Mathieu-Daudé <philmd@linaro.org> | 2023-04-20 10:21:15 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2023-04-20 10:21:15 +0100 |
| commit | 409504a1d59efb61316de80b3dfb593b4f53ef14 (patch) | |
| tree | b8782052d87346ff18faab17c2c92aa545c5984a | |
| parent | 25d758175dfbfd53e02b4a52ac68cbd6eb05f648 (diff) | |
| download | focaccia-qemu-409504a1d59efb61316de80b3dfb593b4f53ef14.tar.gz focaccia-qemu-409504a1d59efb61316de80b3dfb593b4f53ef14.zip | |
target/arm: Remove KVM AArch32 CPU definitions
Missed in commit 80485d88f9 ("target/arm: Restrict
v7A TCG cpus to TCG accel").
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230405100848.76145-2-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| -rw-r--r-- | target/arm/cpu_tcg.c | 2 | ||||
| -rw-r--r-- | target/arm/kvm-consts.h | 9 |
2 files changed, 3 insertions, 8 deletions
diff --git a/target/arm/cpu_tcg.c b/target/arm/cpu_tcg.c index df0c45e523..1911d7ec47 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/cpu_tcg.c @@ -546,7 +546,6 @@ static void cortex_a7_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); set_feature(&cpu->env, ARM_FEATURE_PMU); - cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A7; cpu->midr = 0x410fc075; cpu->reset_fpsid = 0x41023075; cpu->isar.mvfr0 = 0x10110222; @@ -595,7 +594,6 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_EL2); set_feature(&cpu->env, ARM_FEATURE_EL3); set_feature(&cpu->env, ARM_FEATURE_PMU); - cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15; /* r4p0 cpu, not requiring expensive tlb flush errata */ cpu->midr = 0x414fc0f0; cpu->revidr = 0x0; diff --git a/target/arm/kvm-consts.h b/target/arm/kvm-consts.h index 09967ec5e6..7c6adc14f6 100644 --- a/target/arm/kvm-consts.h +++ b/target/arm/kvm-consts.h @@ -124,13 +124,10 @@ MISMATCH_CHECK(QEMU_PSCI_RET_INTERNAL_FAILURE, PSCI_RET_INTERNAL_FAILURE); MISMATCH_CHECK(QEMU_PSCI_RET_NOT_PRESENT, PSCI_RET_NOT_PRESENT); MISMATCH_CHECK(QEMU_PSCI_RET_DISABLED, PSCI_RET_DISABLED); -/* Note that KVM uses overlapping values for AArch32 and AArch64 - * target CPU numbers. AArch32 targets: +/* + * Note that KVM uses overlapping values for AArch32 and AArch64 + * target CPU numbers. AArch64 targets: */ -#define QEMU_KVM_ARM_TARGET_CORTEX_A15 0 -#define QEMU_KVM_ARM_TARGET_CORTEX_A7 1 - -/* AArch64 targets: */ #define QEMU_KVM_ARM_TARGET_AEM_V8 0 #define QEMU_KVM_ARM_TARGET_FOUNDATION_V8 1 #define QEMU_KVM_ARM_TARGET_CORTEX_A57 2 |