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authorRichard Henderson <richard.henderson@linaro.org>2025-04-03 08:44:13 -0700
committerRichard Henderson <richard.henderson@linaro.org>2025-04-23 15:04:57 -0700
commit43d6a56a0574775c1b5ce5c5ad0c7f9dded83c87 (patch)
treec900efd88addc0f891cc033790a835222a88fd0b
parentbefb31d349e1761855a24023f21aab4207ce5392 (diff)
downloadfocaccia-qemu-43d6a56a0574775c1b5ce5c5ad0c7f9dded83c87.tar.gz
focaccia-qemu-43d6a56a0574775c1b5ce5c5ad0c7f9dded83c87.zip
target/hexagon: Implement TCGCPUOps.mmu_index
This hook is about to become mandatory.  Since hexagon
is still user-only, the implementation is trivial.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/hexagon/cpu.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 766b678651..ad1f303fbc 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -313,6 +313,11 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
     mcc->parent_realize(dev, errp);
 }
 
+static int hexagon_cpu_mmu_index(CPUState *cs, bool ifetch)
+{
+    return MMU_USER_IDX;
+}
+
 static void hexagon_cpu_init(Object *obj)
 {
 }
@@ -324,6 +329,7 @@ static const TCGCPUOps hexagon_tcg_ops = {
     .translate_code = hexagon_translate_code,
     .synchronize_from_tb = hexagon_cpu_synchronize_from_tb,
     .restore_state_to_opc = hexagon_restore_state_to_opc,
+    .mmu_index = hexagon_cpu_mmu_index,
 };
 
 static void hexagon_cpu_class_init(ObjectClass *c, void *data)