diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2011-01-10 16:16:26 +0000 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-12 15:10:47 +0100 |
| commit | 5d48e9174e3bfa8655e1dc8f80887acd9040b427 (patch) | |
| tree | 53ff3fa343d5508d462d3bd9a2c962c0ca8bcfb4 | |
| parent | 56779034530944eb6171d843f652f3fba710ed30 (diff) | |
| download | focaccia-qemu-5d48e9174e3bfa8655e1dc8f80887acd9040b427.tar.gz focaccia-qemu-5d48e9174e3bfa8655e1dc8f80887acd9040b427.zip | |
arm-dis: Include opcode hex when doing disassembly
Enhance the ARM disassembler used for debugging so that it includes the hex dump of the opcode as well as the symbolic disassembly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | arm-dis.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arm-dis.c b/arm-dis.c index af217397d4..3ece02c1b3 100644 --- a/arm-dis.c +++ b/arm-dis.c @@ -4101,6 +4101,30 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info) addresses, since the addend is not currently pc-relative. */ pc = 0; + /* We include the hexdump of the instruction. The format here + matches that used by objdump and the ARM ARM (in particular, + 32 bit Thumb instructions are displayed as pairs of halfwords, + not as a single word.) */ + if (is_thumb) + { + if (size == 2) + { + info->fprintf_func(info->stream, "%04lx ", + ((unsigned long)given) & 0xffff); + } + else + { + info->fprintf_func(info->stream, "%04lx %04lx ", + (((unsigned long)given) >> 16) & 0xffff, + ((unsigned long)given) & 0xffff); + } + } + else + { + info->fprintf_func(info->stream, "%08lx ", + ((unsigned long)given) & 0xffffffff); + } + printer (pc, info, given); if (is_thumb) |