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| author | Andrew Jeffery <andrew@aj.id.au> | 2021-03-09 12:01:28 +0100 |
|---|---|---|
| committer | Cédric Le Goater <clg@kaod.org> | 2021-03-09 12:01:28 +0100 |
| commit | 6820588efa4fbab9ab6f0457f2c83c3bc7498ae3 (patch) | |
| tree | 23dcf706629e5af7e7c5c961f4edf92b00a1ecf1 | |
| parent | b151de69f6478a05b27f4be2eb4a906f7b5b8cfa (diff) | |
| download | focaccia-qemu-6820588efa4fbab9ab6f0457f2c83c3bc7498ae3.tar.gz focaccia-qemu-6820588efa4fbab9ab6f0457f2c83c3bc7498ae3.zip | |
hw/arm: ast2600: Correct the iBT interrupt ID
The AST2600 allocates distinct GIC IRQs for the LPC subdevices such as the iBT device. Previously on the AST2400 and AST2500 the LPC subdevices shared a single LPC IRQ. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20210302014317.915120-4-andrew@aj.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
| -rw-r--r-- | hw/arm/aspeed_ast2600.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 1dc56ce478..7635d4bae9 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -98,7 +98,7 @@ static const int aspeed_soc_ast2600_irqmap[] = { [ASPEED_DEV_WDT] = 24, [ASPEED_DEV_PWM] = 44, [ASPEED_DEV_LPC] = 35, - [ASPEED_DEV_IBT] = 35, /* LPC */ + [ASPEED_DEV_IBT] = 143, [ASPEED_DEV_I2C] = 110, /* 110 -> 125 */ [ASPEED_DEV_ETH1] = 2, [ASPEED_DEV_ETH2] = 3, |