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authorShameer Kolothum <skolothumtho@nvidia.com>2025-08-29 09:25:30 +0100
committerPeter Maydell <peter.maydell@linaro.org>2025-09-16 17:31:54 +0100
commit73d3d0187bc6b482d8b15116edce1475c7975b89 (patch)
tree5d2ebb81d8c8f5ebb6887afaa87de0af4cc71b99
parent66d2f665e163cf1afccd171e3c16f8d3acb3d94a (diff)
downloadfocaccia-qemu-73d3d0187bc6b482d8b15116edce1475c7975b89.tar.gz
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qemu-options.hx: Document the arm-smmuv3 device
Now that arm,virt can have user-creatable smmuv3 devices, document it.

Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Nicolin Chen <nicolinc@nvidia.com>
Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Shameer Kolothum <skolothumtho@nvidia.com>
Reviewed-by: Donald Dutile <ddutile@redhat.com>
Reviewed-by: Nicolin Chen <nicolinc@nvidia.com>
Message-id: 20250829082543.7680-9-skolothumtho@nvidia.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--qemu-options.hx7
1 files changed, 7 insertions, 0 deletions
diff --git a/qemu-options.hx b/qemu-options.hx
index aa44b0e34a..075f4be2e3 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -1231,6 +1231,13 @@ SRST
     ``aw-bits=val`` (val between 32 and 64, default depends on machine)
         This decides the address width of the IOVA address space.
 
+``-device arm-smmuv3,primary-bus=id``
+    This is only supported by ``-machine virt`` (ARM).
+
+    ``primary-bus=id``
+        Accepts either the default root complex (pcie.0) or a
+        pxb-pcie based root complex.
+
 ERST
 
 DEF("name", HAS_ARG, QEMU_OPTION_name,