summary refs log tree commit diff stats
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2017-12-11 15:42:44 +0000
committerPeter Maydell <peter.maydell@linaro.org>2017-12-11 17:11:27 +0000
commit7472e2efb049ea65a6a5e7261b78ebf5c561bc2f (patch)
treece63beb7a915ffb6ba616f9a4346e5f4397b9d5f
parent2babfe0c9241c239272a03fec785165a50e8288c (diff)
downloadfocaccia-qemu-7472e2efb049ea65a6a5e7261b78ebf5c561bc2f.tar.gz
focaccia-qemu-7472e2efb049ea65a6a5e7261b78ebf5c561bc2f.zip
target/arm: Generate UNDEF for 32-bit Thumb2 insns
The refactoring of commit 296e5a0a6c3935 has a nasty bug:
it accidentally dropped the generation of code to raise
the UNDEF exception when disas_thumb2_insn() returns nonzero.
This means that 32-bit Thumb2 instruction patterns that
ought to UNDEF just act like nops instead. This is likely
to break any number of things, including the kernel's "disable
the FPU and use the UNDEF exception to identify when to turn
it back on again" trick.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1513006964-3371-1-git-send-email-peter.maydell@linaro.org
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/arm/translate.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4afb0c86ec..f120932f44 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -12245,7 +12245,10 @@ static void thumb_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu)
     if (is_16bit) {
         disas_thumb_insn(dc, insn);
     } else {
-        disas_thumb2_insn(dc, insn);
+        if (disas_thumb2_insn(dc, insn)) {
+            gen_exception_insn(dc, 4, EXCP_UDEF, syn_uncategorized(),
+                               default_exception_el(dc));
+        }
     }
 
     /* Advance the Thumb condexec condition.  */